From 32e72ca0b74f3ebd8124d4a62a3f6777b6aba428 Mon Sep 17 00:00:00 2001 From: Raihow Shi Date: Wed, 25 May 2022 14:47:13 +0800 Subject: [PATCH] mb/google/brask/variants/moli: correct empty tcss port Correct empty tcss port to meet Moli's schematic design. BUG=b:233834605 TEST=emerge-brask coreboot. Signed-off-by: Raihow Shi Change-Id: Id16744655010e246c8ca8d1050f71a6c6c63d2a7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64660 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/mainboard/google/brya/variants/moli/overridetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/google/brya/variants/moli/overridetree.cb b/src/mainboard/google/brya/variants/moli/overridetree.cb index 36938d7ae8..4433c5b7c9 100644 --- a/src/mainboard/google/brya/variants/moli/overridetree.cb +++ b/src/mainboard/google/brya/variants/moli/overridetree.cb @@ -24,7 +24,7 @@ chip soc/intel/alderlake register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC2)" # USB2 Port3 register "usb2_ports[3]" = "USB2_PORT_SHORT(OC_SKIP)" # Enable USB2 Port4 register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Disable USB2 Port9 - register "tcss_ports[2]" = "TCSS_PORT_EMPTY" # Disable TCP3 + register "tcss_ports[3]" = "TCSS_PORT_EMPTY" # Disable TCP3 register "cnvi_bt_audio_offload" = "true" device domain 0 on device ref tcss_dma0 on