mb/gigabyte/ga-g41m-es2l/devicetree.cb: Indent with tabs
As on most other boards, use tabs to indent the devicetree. Change-Id: If95f1ce6a5347658ecc32097a85b1b6bcc6a1114 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38058 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Angel Pons
Nico Huber
parent
895fb4b361
commit
32f2ccce41
1 changed files with 148 additions and 148 deletions
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@ -15,157 +15,157 @@
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#
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chip northbridge/intel/x4x # Northbridge
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device cpu_cluster 0 on # APIC cluster
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chip cpu/intel/socket_LGA775
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device lapic 0 on end
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end
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chip cpu/intel/model_1067x # CPU
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device lapic 0xACAC off end
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end
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end
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device domain 0 on # PCI domain
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subsystemid 0x1458 0x5000 inherit
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device pci 0.0 on # Host Bridge
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subsystemid 0x1458 0x5000
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end
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device pci 2.0 on # Integrated graphics controller
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subsystemid 0x1458 0xd000
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end
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device pci 2.1 on # Integrated graphics controller 2
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subsystemid 0x1458 0xd001
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end
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device pci 3.0 off end # ME
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device pci 3.1 off end # ME
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chip southbridge/intel/i82801gx # Southbridge
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register "pirqa_routing" = "0x0b"
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register "pirqb_routing" = "0x0b"
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register "pirqc_routing" = "0x0b"
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register "pirqd_routing" = "0x0b"
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register "pirqe_routing" = "0x0b"
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register "pirqf_routing" = "0x0b"
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register "pirqg_routing" = "0x0b"
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register "pirqh_routing" = "0x0b"
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register "ide_enable_primary" = "0x1"
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register "ide_enable_secondary" = "0x0"
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register "sata_ports_implemented" = "0x3"
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register "gpe0_en" = "0x40"
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device cpu_cluster 0 on # APIC cluster
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chip cpu/intel/socket_LGA775
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device lapic 0 on end
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end
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chip cpu/intel/model_1067x # CPU
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device lapic 0xACAC off end
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end
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end
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device domain 0 on # PCI domain
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subsystemid 0x1458 0x5000 inherit
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device pci 0.0 on # Host Bridge
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subsystemid 0x1458 0x5000
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end
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device pci 2.0 on # Integrated graphics controller
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subsystemid 0x1458 0xd000
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end
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device pci 2.1 on # Integrated graphics controller 2
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subsystemid 0x1458 0xd001
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end
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device pci 3.0 off end # ME
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device pci 3.1 off end # ME
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chip southbridge/intel/i82801gx # Southbridge
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register "pirqa_routing" = "0x0b"
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register "pirqb_routing" = "0x0b"
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register "pirqc_routing" = "0x0b"
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register "pirqd_routing" = "0x0b"
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register "pirqe_routing" = "0x0b"
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register "pirqf_routing" = "0x0b"
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register "pirqg_routing" = "0x0b"
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register "pirqh_routing" = "0x0b"
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register "ide_enable_primary" = "0x1"
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register "ide_enable_secondary" = "0x0"
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register "sata_ports_implemented" = "0x3"
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register "gpe0_en" = "0x40"
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register "gen2_dec" = "0x007c0291" # HWM
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register "gen2_dec" = "0x007c0291" # HWM
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device pci 1b.0 on # Audio
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subsystemid 0x1458 0xa002
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end
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device pci 1c.0 on end # PCIe 1
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device pci 1c.1 on # PCIe 2 (NIC)
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device pci 00.0 on # PCI 10ec:8168
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subsystemid 0x1458 0xe000
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end
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end
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device pci 1c.2 off end # PCIe 3
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device pci 1c.3 off end # PCIe 4
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device pci 1d.0 on # USB
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subsystemid 0x1458 0x5004
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end
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device pci 1d.1 on # USB
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subsystemid 0x1458 0x5004
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end
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device pci 1d.2 on # USB
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subsystemid 0x1458 0x5004
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end
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device pci 1d.3 on # USB
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subsystemid 0x1458 0x5004
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end
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device pci 1d.7 on # USB
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subsystemid 0x1458 0x5006
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end
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device pci 1e.0 on end # PCI bridge
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device pci 1e.2 off end # AC'97 Audio
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device pci 1e.3 off end # AC'97 Modem
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device pci 1f.0 on # ISA bridge
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subsystemid 0x1458 0x5001
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chip superio/ite/it8718f # Super I/O
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register "TMPIN1.mode" = "THERMAL_RESISTOR"
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register "TMPIN2.mode" = "THERMAL_RESISTOR"
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register "TMPIN3.mode" = "THERMAL_DIODE"
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register "TMPIN3.offset" = "0"
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register "ec.vin_mask" = "VIN7 | VIN4 | VIN3 | VIN2 | VIN1 | VIN0"
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device pci 1b.0 on # Audio
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subsystemid 0x1458 0xa002
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end
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device pci 1c.0 on end # PCIe 1
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device pci 1c.1 on # PCIe 2 (NIC)
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device pci 00.0 on # PCI 10ec:8168
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subsystemid 0x1458 0xe000
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end
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end
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device pci 1c.2 off end # PCIe 3
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device pci 1c.3 off end # PCIe 4
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device pci 1d.0 on # USB
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subsystemid 0x1458 0x5004
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end
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device pci 1d.1 on # USB
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subsystemid 0x1458 0x5004
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end
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device pci 1d.2 on # USB
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subsystemid 0x1458 0x5004
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end
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device pci 1d.3 on # USB
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subsystemid 0x1458 0x5004
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end
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device pci 1d.7 on # USB
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subsystemid 0x1458 0x5006
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end
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device pci 1e.0 on end # PCI bridge
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device pci 1e.2 off end # AC'97 Audio
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device pci 1e.3 off end # AC'97 Modem
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device pci 1f.0 on # ISA bridge
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subsystemid 0x1458 0x5001
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chip superio/ite/it8718f # Super I/O
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register "TMPIN1.mode" = "THERMAL_RESISTOR"
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register "TMPIN2.mode" = "THERMAL_RESISTOR"
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register "TMPIN3.mode" = "THERMAL_DIODE"
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register "TMPIN3.offset" = "0"
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register "ec.vin_mask" = "VIN7 | VIN4 | VIN3 | VIN2 | VIN1 | VIN0"
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register "FAN1.mode" = "FAN_SMART_AUTOMATIC"
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register "FAN1.smart.tmpin" = "3"
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register "FAN1.smart.tmp_off" = "25"
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register "FAN1.smart.tmp_start" = "30"
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register "FAN1.smart.tmp_full" = "65"
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register "FAN1.smart.tmp_delta" = "3"
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register "FAN1.smart.smoothing" = "1"
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register "FAN1.smart.pwm_start" = "0"
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register "FAN1.smart.slope" = "10"
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register "FAN1.mode" = "FAN_SMART_AUTOMATIC"
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register "FAN1.smart.tmpin" = "3"
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register "FAN1.smart.tmp_off" = "25"
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register "FAN1.smart.tmp_start" = "30"
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register "FAN1.smart.tmp_full" = "65"
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register "FAN1.smart.tmp_delta" = "3"
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register "FAN1.smart.smoothing" = "1"
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register "FAN1.smart.pwm_start" = "0"
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register "FAN1.smart.slope" = "10"
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register "FAN2.mode" = "FAN_SMART_AUTOMATIC"
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register "FAN2.smart.tmpin" = "3"
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register "FAN2.smart.tmp_off" = "25"
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register "FAN2.smart.tmp_start" = "30"
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register "FAN2.smart.tmp_full" = "65"
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register "FAN2.smart.tmp_delta" = "3"
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register "FAN2.smart.smoothing" = "1"
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register "FAN2.smart.pwm_start" = "0"
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register "FAN2.smart.slope" = "10"
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register "FAN2.mode" = "FAN_SMART_AUTOMATIC"
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register "FAN2.smart.tmpin" = "3"
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register "FAN2.smart.tmp_off" = "25"
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register "FAN2.smart.tmp_start" = "30"
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register "FAN2.smart.tmp_full" = "65"
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register "FAN2.smart.tmp_delta" = "3"
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register "FAN2.smart.smoothing" = "1"
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register "FAN2.smart.pwm_start" = "0"
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register "FAN2.smart.slope" = "10"
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device pnp 2e.0 on # Floppy
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io 0x60 = 0x3f0
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irq 0x70 = 6
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drq 0x74 = 2
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irq 0xf0 = 0x00
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irq 0xf1 = 0x80
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end
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device pnp 2e.1 on # COM1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.2 on # COM2
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 2e.3 on # Parallel port
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io 0x60 = 0x378
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irq 0x70 = 7
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io 0x62 = 0x000
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drq 0x74 = 4
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irq 0xf0 = 0x08
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end
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device pnp 2e.4 on # Environment controller
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io 0x60 = 0x290
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irq 0x70 = 0x00
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io 0x62 = 0x000
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irq 0xf0 = 0x80
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irq 0xf1 = 0x00
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irq 0xf2 = 0x0a
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irq 0xf3 = 0x80
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irq 0xf4 = 0x00
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irq 0xf5 = 0x00
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irq 0xf6 = 0xff
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end
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device pnp 2e.5 on # Keyboard
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io 0x60 = 0x60
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irq 0x70 = 1
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io 0x62 = 0x64
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irq 0xf0 = 0x48
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end
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device pnp 2e.6 on # Mouse
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irq 0x70 = 12
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irq 0x71 = 2
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irq 0xf0 = 0
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end
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end
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end
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device pci 1f.1 on # PATA/IDE
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subsystemid 0x1458 0xb004
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end
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device pci 1f.2 on # SATA
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subsystemid 0x1458 0xb005
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end
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device pci 1f.3 on # SMbus
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subsystemid 0x1458 0x5001
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end
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end
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end
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device pnp 2e.0 on # Floppy
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io 0x60 = 0x3f0
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irq 0x70 = 6
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drq 0x74 = 2
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irq 0xf0 = 0x00
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irq 0xf1 = 0x80
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end
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device pnp 2e.1 on # COM1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.2 on # COM2
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 2e.3 on # Parallel port
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io 0x60 = 0x378
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irq 0x70 = 7
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io 0x62 = 0x000
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drq 0x74 = 4
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irq 0xf0 = 0x08
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end
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device pnp 2e.4 on # Environment controller
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io 0x60 = 0x290
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irq 0x70 = 0x00
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io 0x62 = 0x000
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irq 0xf0 = 0x80
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irq 0xf1 = 0x00
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irq 0xf2 = 0x0a
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irq 0xf3 = 0x80
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irq 0xf4 = 0x00
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irq 0xf5 = 0x00
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irq 0xf6 = 0xff
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end
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device pnp 2e.5 on # Keyboard
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io 0x60 = 0x60
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irq 0x70 = 1
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io 0x62 = 0x64
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irq 0xf0 = 0x48
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end
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device pnp 2e.6 on # Mouse
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irq 0x70 = 12
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irq 0x71 = 2
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irq 0xf0 = 0
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end
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end
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end
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device pci 1f.1 on # PATA/IDE
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subsystemid 0x1458 0xb004
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end
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device pci 1f.2 on # SATA
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subsystemid 0x1458 0xb005
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end
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device pci 1f.3 on # SMbus
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subsystemid 0x1458 0x5001
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end
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end
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end
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end
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