mb/starlabs/labtop: Add comments for GPIOs
Add comment for each GPIO details its endpoint based on the schematic. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ia3678274dcd52285019fb3cf8ccd22617268ce1a Reviewed-on: https://review.coreboot.org/c/coreboot/+/60123 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
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3307451752
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@ -9,7 +9,9 @@
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/* Early pad configuration in bootblock */
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/* Early pad configuration in bootblock */
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const struct pad_config early_gpio_table[] = {
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const struct pad_config early_gpio_table[] = {
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/* C20: UART2_RXD_R */
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PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1),
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/* C21: UART2_TXD_R */
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PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1),
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};
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};
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@ -19,201 +21,408 @@ const struct pad_config *variant_early_gpio_table(size_t *num)
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return early_gpio_table;
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return early_gpio_table;
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}
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}
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/* Pad configuration in ramstage.c */
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/* Pad configuration in ramstage. */
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const struct pad_config gpio_table[] = {
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const struct pad_config gpio_table[] = {
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/* REFERENCE: EP PER SCHEMATIC */
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/* GPD0: PCH_BATLOW# */
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PAD_CFG_NF(GPD0, UP_20K, PWROK, NF1),
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PAD_CFG_NF(GPD0, UP_20K, PWROK, NF1),
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/* GPD1: AC_PRESENT */
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PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1),
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PAD_CFG_NF(GPD1, NATIVE, PWROK, NF1),
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/* GPD2: LAN_WAKE# */
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PAD_CFG_NF(GPD2, NATIVE, PWROK, NF1),
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PAD_CFG_NF(GPD2, NATIVE, PWROK, NF1),
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/* GPD3: SIO_PWRBTN# */
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PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1),
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PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1),
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/* GPD4: SIO_SLP_S3# */
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PAD_CFG_NF(GPD4, NONE, PWROK, NF1),
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PAD_CFG_NF(GPD4, NONE, PWROK, NF1),
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/* GPD5: SIO_SLP_S4# */
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PAD_CFG_NF(GPD5, NONE, PWROK, NF1),
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PAD_CFG_NF(GPD5, NONE, PWROK, NF1),
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/* GPD6: SIO_SLP_A# */
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PAD_CFG_NF(GPD6, NONE, PWROK, NF1),
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PAD_CFG_NF(GPD6, NONE, PWROK, NF1),
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/* GPD7: PCH_TBT_PERST# */
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PAD_CFG_GPO(GPD7, 0, PWROK),
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PAD_CFG_GPO(GPD7, 0, PWROK),
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/* GPD8: SUSCLK */
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PAD_CFG_NF(GPD8, NONE, PWROK, NF1),
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PAD_CFG_NF(GPD8, NONE, PWROK, NF1),
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/* GPD9: SIO_SLP_WLAN# */
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PAD_CFG_NF(GPD9, NONE, PWROK, NF1),
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PAD_CFG_NF(GPD9, NONE, PWROK, NF1),
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/* GPD10: SIO_SLP_S5# */
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PAD_CFG_NF(GPD10, NONE, PWROK, NF1),
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PAD_CFG_NF(GPD10, NONE, PWROK, NF1),
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/* GPD11: PM_LANPHY_EN */
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PAD_CFG_GPO(GPD11, 0, PWROK),
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PAD_CFG_GPO(GPD11, 0, PWROK),
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/* A0: ESPI_IO_0 */
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PAD_CFG_NF(GPP_A0, UP_20K, DEEP, NF1),
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PAD_CFG_NF(GPP_A0, UP_20K, DEEP, NF1),
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/* A1: ESPI_IO_1 */
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PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF1),
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PAD_CFG_NF(GPP_A1, UP_20K, DEEP, NF1),
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/* A2: ESPI_IO_2 */
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PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF1),
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PAD_CFG_NF(GPP_A2, UP_20K, DEEP, NF1),
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/* A3: ESPI_IO_3 */
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PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF1),
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PAD_CFG_NF(GPP_A3, UP_20K, DEEP, NF1),
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/* A4: ESPI_CS_L */
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PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF1),
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PAD_CFG_NF(GPP_A4, UP_20K, DEEP, NF1),
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/* A5: ESPI_CLK */
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PAD_CFG_NF(GPP_A5, DN_20K, DEEP, NF1),
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PAD_CFG_NF(GPP_A5, DN_20K, DEEP, NF1),
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/* A6: Not Connected(TP764) */
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PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
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/* A7: WLAN_PCM_CLK */
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PAD_NC(GPP_A7, NONE),
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PAD_NC(GPP_A7, NONE),
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/* A8: WLAN_PCM_RST */
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PAD_CFG_NF(GPP_A8, NONE, DEEP, NF2),
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PAD_CFG_NF(GPP_A8, NONE, DEEP, NF2),
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/* A9: WLAN_PCM_CLKREQ0 */
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PAD_CFG_NF(GPP_A9, NONE, DEEP, NF3),
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PAD_CFG_NF(GPP_A9, NONE, DEEP, NF3),
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/* A10: WLAN_PCM_IN */
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PAD_NC(GPP_A10, NONE),
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PAD_NC(GPP_A10, NONE),
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/* A11: M2_CPU_SSD_RST_N */
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PAD_CFG_GPO(GPP_A11, 1, PLTRST),
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PAD_CFG_GPO(GPP_A11, 1, PLTRST),
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/* A12: SATAGP_1 */
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PAD_CFG_NF(GPP_A12, UP_20K, DEEP, NF1),
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PAD_CFG_NF(GPP_A12, UP_20K, DEEP, NF1),
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/* A13: Not Connected */
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PAD_NC(GPP_A13, NONE),
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PAD_NC(GPP_A13, NONE),
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/* A14: Not Connected */
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PAD_CFG_GPO(GPP_A14, 0, PLTRST),
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PAD_CFG_GPO(GPP_A14, 0, PLTRST),
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/* A15 Not Connected */
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PAD_NC(GPP_A15, NONE),
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PAD_NC(GPP_A15, NONE),
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/* A16: USB2_OCB_3 */
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PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1),
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/* A17: Not Connected */
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PAD_NC(GPP_A17, NONE),
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PAD_NC(GPP_A17, NONE),
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/* A18: DDIB_HPD */
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PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1),
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/* A19 Not Connected */
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PAD_NC(GPP_A19, NONE),
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PAD_NC(GPP_A19, NONE),
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/* A20: Not Connected */
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PAD_NC(GPP_A20, NONE),
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PAD_NC(GPP_A20, NONE),
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/* A21 Not Connected */
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PAD_NC(GPP_A21, NONE),
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PAD_NC(GPP_A21, NONE),
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/* A22: Not Connected */
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PAD_NC(GPP_A22, NONE),
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PAD_NC(GPP_A22, NONE),
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/* A23: TC_RETIMER_FORCE_PWR */
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PAD_CFG_GPO(GPP_A23, 0, PLTRST),
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PAD_CFG_GPO(GPP_A23, 0, PLTRST),
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/* B0: CORE_VID_0 */
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PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1),
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/* B1: CORE_VID_1 */
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PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1),
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/* B2: VRALERT_N */
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PAD_NC(GPP_B2, NONE),
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PAD_NC(GPP_B2, NONE),
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/* B3: Not Connected */
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PAD_NC(GPP_B3, NONE),
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PAD_NC(GPP_B3, NONE),
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/* B4: Not Connected */
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PAD_NC(GPP_B4, NONE),
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PAD_NC(GPP_B4, NONE),
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/* B5: Not Connected */
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PAD_NC(GPP_B5, NONE),
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PAD_NC(GPP_B5, NONE),
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/* B6: Not Connected */
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PAD_NC(GPP_B6, NONE),
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PAD_NC(GPP_B6, NONE),
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/* B7: Not Connected */
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PAD_NC(GPP_B7, NONE),
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PAD_NC(GPP_B7, NONE),
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/* B8: Not Connected */
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PAD_NC(GPP_B8, NONE),
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PAD_NC(GPP_B8, NONE),
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/* B9: PWR_MON_I2C_SDA_R */
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PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1),
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/* B10: PWR_MON_I2C_SCL_R */
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PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),
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/* B11: I2C_PMC_PD_INT_N */
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PAD_CFG_NF(GPP_B11, NONE, PWROK, NF1),
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PAD_CFG_NF(GPP_B11, NONE, PWROK, NF1),
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/* B12: PM_SLP_S0_N */
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PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
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/* B13: PLT_RST_N */
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PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
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/* B14: FPS_RST_N */
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PAD_CFG_GPO(GPP_B14, 1, PLTRST),
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PAD_CFG_GPO(GPP_B14, 1, PLTRST),
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/* B15: Not Connected */
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PAD_NC(GPP_B15, NONE),
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PAD_NC(GPP_B15, NONE),
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/* B16: M2_PCH_SSD_PWREN */
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PAD_NC(GPP_B16, NONE),
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PAD_NC(GPP_B16, NONE),
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/* B17: Not Connected */
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PAD_CFG_GPO(GPP_B17, 0, PWROK),
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PAD_CFG_GPO(GPP_B17, 0, PWROK),
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/* B18: UF_CAM_STROBE */
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PAD_CFG_GPO(GPP_B18, 0, DEEP),
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PAD_CFG_GPO(GPP_B18, 0, DEEP),
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/* B19: GSPI1_CS0_FPS_N */
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PAD_NC(GPP_B19, NONE),
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PAD_NC(GPP_B19, NONE),
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/* B20: GSPI1_CLK_FPS */
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PAD_NC(GPP_B20, NONE),
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PAD_NC(GPP_B20, NONE),
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/* B21: GSPI1_MISO_FPS */
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PAD_NC(GPP_B21, NONE),
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PAD_NC(GPP_B21, NONE),
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/* B22: GSPI1_MOSI_FPS */
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PAD_CFG_GPO(GPP_B22, 0, DEEP),
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PAD_CFG_GPO(GPP_B22, 0, DEEP),
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/* B23: CPU_CLKFREQ */
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PAD_CFG_GPO(GPP_B23, 0, DEEP),
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PAD_CFG_GPO(GPP_B23, 0, DEEP),
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/* C0: SMBCLK */
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PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
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/* C1: SMBDATA */
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PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
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/* C2: SMBALERT_N */
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PAD_CFG_GPO(GPP_C2, 0, DEEP),
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PAD_CFG_GPO(GPP_C2, 0, DEEP),
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/* C3: SML0_CLK */
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PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),
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/* C4: SML0_DATA */
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PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),
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/* C5: SML0ALERT_IN */
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PAD_CFG_GPO(GPP_C5, 0, DEEP),
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PAD_CFG_GPO(GPP_C5, 0, DEEP),
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/* C6: SML1_CLK */
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PAD_CFG_NF(GPP_C6, NONE, PWROK, NF1),
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PAD_CFG_NF(GPP_C6, NONE, PWROK, NF1),
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/* C7: SML1_DATA */
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PAD_CFG_NF(GPP_C7, NONE, PWROK, NF1),
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PAD_CFG_NF(GPP_C7, NONE, PWROK, NF1),
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/* C8: CLICK_PAD_INT_N */
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PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),
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/* C9: Not Connected */
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PAD_NC(GPP_C9, NONE),
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PAD_NC(GPP_C9, NONE),
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/* C10: Not Connected */
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PAD_CFG_GPO(GPP_C10, 0, PWROK),
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PAD_CFG_GPO(GPP_C10, 0, PWROK),
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/* C11: Not Connected */
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PAD_CFG_GPO(GPP_C11, 0, PWROK),
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PAD_CFG_GPO(GPP_C11, 0, PWROK),
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/* C12: Not Connected */
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PAD_CFG_NF(GPP_C12, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_C12, NONE, DEEP, NF1),
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/* C13: Not Connected */
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PAD_CFG_GPO(GPP_C13, 1, PLTRST),
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PAD_CFG_GPO(GPP_C13, 1, PLTRST),
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/* C14: TPM_IRQ */
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PAD_NC(GPP_C14, NONE),
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PAD_NC(GPP_C14, NONE),
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/* C15: TPM_RST */
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PAD_NC(GPP_C15, NONE),
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PAD_NC(GPP_C15, NONE),
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/* C16: I2C0_SDA */
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PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1),
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/* C17: I2C0_SCL */
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PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_C17, NONE, DEEP, NF1),
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/* C18: TOUCH_I2C_SDA */
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PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1),
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/* C19: TOUCH_I2C_CLK */
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PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1),
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/* C22: Not Connected */
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PAD_NC(GPP_C22, NONE),
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PAD_NC(GPP_C22, NONE),
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/* C23: WLAN_WAKE_N */
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PAD_NC(GPP_C23, NONE),
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PAD_NC(GPP_C23, NONE),
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/* D0: ACCEL1_INT */
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PAD_NC(GPP_D0, NONE),
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PAD_NC(GPP_D0, NONE),
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/* D1: ACCEL2_INT */
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PAD_NC(GPP_D1, NONE),
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PAD_NC(GPP_D1, NONE),
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/* D2: Not Connected */
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PAD_CFG_GPI(GPP_D2, NONE, DEEP),
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PAD_CFG_GPI(GPP_D2, NONE, DEEP),
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/* D3: Not Connected */
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PAD_CFG_GPI(GPP_D3, NONE, DEEP),
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PAD_CFG_GPI(GPP_D3, NONE, DEEP),
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/* D4: Not Connected */
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PAD_NC(GPP_D4, NONE),
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PAD_NC(GPP_D4, NONE),
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/* D5: CLKREQ0_M2_SSD_N */
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PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1),
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/* D6: CLKREQ1_WLAN_N */
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PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1),
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/* D7: LAN_CLKREQ# */
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PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1),
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/* D8: Not Connected */
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PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1),
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/* D9: Not Connected */
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PAD_NC(GPP_D9, NATIVE),
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PAD_NC(GPP_D9, NATIVE),
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/* D10: Not Connected */
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PAD_NC(GPP_D10, NATIVE),
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PAD_NC(GPP_D10, NATIVE),
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/* D11: Not Connected */
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PAD_NC(GPP_D11, NATIVE),
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PAD_NC(GPP_D11, NATIVE),
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/* D12: Not Connected */
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PAD_NC(GPP_D12, NATIVE),
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PAD_NC(GPP_D12, NATIVE),
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/* D13: Not Connected */
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PAD_NC(GPP_D13, NONE),
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PAD_NC(GPP_D13, NONE),
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/* D14: Not Connected */
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PAD_NC(GPP_D14, NONE),
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PAD_NC(GPP_D14, NONE),
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/* D15: Not Connected */
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PAD_NC(GPP_D15, NONE),
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PAD_NC(GPP_D15, NONE),
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/* D16: CPU_SSD_PWREN */
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PAD_CFG_GPO(GPP_D16, 1, PLTRST),
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PAD_CFG_GPO(GPP_D16, 1, PLTRST),
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/* D17: Not Connected */
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PAD_CFG_GPI(GPP_D17, NONE, DEEP),
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PAD_CFG_GPI(GPP_D17, NONE, DEEP),
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/* D18: Not Connected */
|
||||||
PAD_CFG_GPI(GPP_D18, NONE, DEEP),
|
PAD_CFG_GPI(GPP_D18, NONE, DEEP),
|
||||||
|
/* D19: GPPC_D_19_WFCAM_PD_N */
|
||||||
PAD_CFG_TERM_GPO(GPP_D19, 1, UP_20K, DEEP),
|
PAD_CFG_TERM_GPO(GPP_D19, 1, UP_20K, DEEP),
|
||||||
|
|
||||||
|
/* E0: SATAXPCIE_0_SATAGP_0 */
|
||||||
PAD_NC(GPP_E0, NONE),
|
PAD_NC(GPP_E0, NONE),
|
||||||
|
/* E1: Not Connected */
|
||||||
PAD_NC(GPP_E1, NONE),
|
PAD_NC(GPP_E1, NONE),
|
||||||
|
/* E2: Not Connected */
|
||||||
PAD_NC(GPP_E2, NONE),
|
PAD_NC(GPP_E2, NONE),
|
||||||
|
/* E3: FPS_INT */
|
||||||
PAD_CFG_NF(GPP_E3, NONE, DEEP, NF1),
|
PAD_CFG_NF(GPP_E3, NONE, DEEP, NF1),
|
||||||
|
/* E4: Not Connected */
|
||||||
PAD_NC(GPP_E4, NONE),
|
PAD_NC(GPP_E4, NONE),
|
||||||
|
/* E5: Not Connected */
|
||||||
PAD_NC(GPP_E5, NONE),
|
PAD_NC(GPP_E5, NONE),
|
||||||
|
/* E6: THC0_SPI1_RST_N_TCH_PNL */
|
||||||
PAD_NC(GPP_E6, NONE),
|
PAD_NC(GPP_E6, NONE),
|
||||||
|
/* E7: EC_SMI_LP_N */
|
||||||
PAD_NC(GPP_E7, NONE),
|
PAD_NC(GPP_E7, NONE),
|
||||||
|
/* E8: EC_SLP_S0IX_N */
|
||||||
PAD_NC(GPP_E8, NONE),
|
PAD_NC(GPP_E8, NONE),
|
||||||
|
/* E9: USB2_TCP01_OC_N */
|
||||||
PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
|
PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
|
||||||
|
/* E10: SPI1_TCH_PNL_CS_N */
|
||||||
PAD_NC(GPP_E10, NONE),
|
PAD_NC(GPP_E10, NONE),
|
||||||
|
/* E11: SPI1_CLK */
|
||||||
PAD_NC(GPP_E11, NONE),
|
PAD_NC(GPP_E11, NONE),
|
||||||
|
/* E12: Not Connected */
|
||||||
PAD_NC(GPP_E12, NONE),
|
PAD_NC(GPP_E12, NONE),
|
||||||
|
/* E13: Not Connected */
|
||||||
PAD_NC(GPP_E13, NONE),
|
PAD_NC(GPP_E13, NONE),
|
||||||
|
/* E14: EDP_HPD */
|
||||||
PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
|
PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
|
||||||
|
/* E15: Not Connected */
|
||||||
PAD_CFG_NF(GPP_E15, NONE, DEEP, NF2),
|
PAD_CFG_NF(GPP_E15, NONE, DEEP, NF2),
|
||||||
|
/* E16: Not Connected */
|
||||||
PAD_CFG_NF(GPP_E16, NONE, DEEP, NF2),
|
PAD_CFG_NF(GPP_E16, NONE, DEEP, NF2),
|
||||||
|
/* E17: Not Connected */
|
||||||
PAD_NC(GPP_E17, NONE),
|
PAD_NC(GPP_E17, NONE),
|
||||||
|
/* E18: TBT_LSX0_TXD */
|
||||||
PAD_NC(GPP_E18, NATIVE),
|
PAD_NC(GPP_E18, NATIVE),
|
||||||
|
/* E19: TBT_LSX0_RXD */
|
||||||
PAD_NC(GPP_E19, NATIVE),
|
PAD_NC(GPP_E19, NATIVE),
|
||||||
|
/* E20: Not Connected */
|
||||||
PAD_NC(GPP_E20, NATIVE),
|
PAD_NC(GPP_E20, NATIVE),
|
||||||
|
/* E21: TBT_LSX1_RXD */
|
||||||
PAD_NC(GPP_E21, NATIVE),
|
PAD_NC(GPP_E21, NATIVE),
|
||||||
|
/* E22: Not Connected */
|
||||||
PAD_CFG_NF(GPP_E22, DN_20K, DEEP, NF2),
|
PAD_CFG_NF(GPP_E22, DN_20K, DEEP, NF2),
|
||||||
|
/* E23: Not Connected */
|
||||||
PAD_CFG_GPO(GPP_E23, 0, DEEP),
|
PAD_CFG_GPO(GPP_E23, 0, DEEP),
|
||||||
|
|
||||||
|
/* F0: CNV_BRI_DT_BT_UART0_RTS_R */
|
||||||
PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1),
|
PAD_CFG_NF(GPP_F0, NONE, DEEP, NF1),
|
||||||
|
/* F1: CNV_BRI_RSP_BT_UART0_RX_R */
|
||||||
PAD_CFG_NF(GPP_F1, UP_20K, DEEP, NF1),
|
PAD_CFG_NF(GPP_F1, UP_20K, DEEP, NF1),
|
||||||
|
/* F2: CNV_RGI_DT_BT_UART0_TX_R */
|
||||||
PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1),
|
PAD_CFG_NF(GPP_F2, NONE, DEEP, NF1),
|
||||||
|
/* F3: CNV_RGI_RSP_BT_UART0_CTS */
|
||||||
PAD_CFG_NF(GPP_F3, UP_20K, DEEP, NF1),
|
PAD_CFG_NF(GPP_F3, UP_20K, DEEP, NF1),
|
||||||
|
/* F4: Not Connected */
|
||||||
PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1),
|
PAD_CFG_NF(GPP_F4, NONE, DEEP, NF1),
|
||||||
|
/* F5: GPPC_F5_MODEM_CLKREQ */
|
||||||
PAD_CFG_NF(GPP_F5, NONE, DEEP, NF2),
|
PAD_CFG_NF(GPP_F5, NONE, DEEP, NF2),
|
||||||
|
/* F6: Not Connected */
|
||||||
PAD_NC(GPP_F6, NONE),
|
PAD_NC(GPP_F6, NONE),
|
||||||
|
/* F7: BIOS_REC */
|
||||||
PAD_CFG_GPO(GPP_F7, 1, PLTRST),
|
PAD_CFG_GPO(GPP_F7, 1, PLTRST),
|
||||||
|
/* F8: Not Connected */
|
||||||
PAD_NC(GPP_F8, NONE),
|
PAD_NC(GPP_F8, NONE),
|
||||||
|
/* F9: Not Connected */
|
||||||
PAD_CFG_GPO(GPP_F9, 1, PLTRST),
|
PAD_CFG_GPO(GPP_F9, 1, PLTRST),
|
||||||
|
/* F10: GPPC_F_10 */
|
||||||
PAD_CFG_GPO(GPP_F10, 0, DEEP),
|
PAD_CFG_GPO(GPP_F10, 0, DEEP),
|
||||||
|
/* F11: Not Connected */
|
||||||
PAD_NC(GPP_F11, NONE),
|
PAD_NC(GPP_F11, NONE),
|
||||||
|
/* F12: Not Connected */
|
||||||
PAD_NC(GPP_F12, NONE),
|
PAD_NC(GPP_F12, NONE),
|
||||||
|
/* F13: Not Connected */
|
||||||
PAD_NC(GPP_F13, NONE),
|
PAD_NC(GPP_F13, NONE),
|
||||||
|
/* F14: Not Connected */
|
||||||
PAD_NC(GPP_F14, NONE),
|
PAD_NC(GPP_F14, NONE),
|
||||||
|
/* F15: Not Connected */
|
||||||
PAD_NC(GPP_F15, NONE),
|
PAD_NC(GPP_F15, NONE),
|
||||||
|
/* F16: Not Connected */
|
||||||
PAD_NC(GPP_F16, NONE),
|
PAD_NC(GPP_F16, NONE),
|
||||||
|
/* F17: TOUCH_PANEL_RESET_N */
|
||||||
PAD_NC(GPP_F17, NONE),
|
PAD_NC(GPP_F17, NONE),
|
||||||
|
/* F18: TOUCH_PANEL_INT_N */
|
||||||
PAD_NC(GPP_F18, NONE),
|
PAD_NC(GPP_F18, NONE),
|
||||||
|
/* F19: Not Connected */
|
||||||
PAD_NC(GPP_F19, NONE),
|
PAD_NC(GPP_F19, NONE),
|
||||||
|
/* F20: Not Connected */
|
||||||
PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1),
|
PAD_CFG_NF(GPP_F20, NONE, DEEP, NF1),
|
||||||
|
/* F21: Not Connected */
|
||||||
PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1),
|
PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1),
|
||||||
|
/* F22: Not Connected */
|
||||||
PAD_NC(GPP_F22, NONE),
|
PAD_NC(GPP_F22, NONE),
|
||||||
|
/* F23: Not Connected */
|
||||||
PAD_NC(GPP_F23, NONE),
|
PAD_NC(GPP_F23, NONE),
|
||||||
|
|
||||||
|
/* H0: GPPC_H0_M2_SSD_RST_N */
|
||||||
PAD_CFG_GPO(GPP_H0, 0, DEEP),
|
PAD_CFG_GPO(GPP_H0, 0, DEEP),
|
||||||
|
/* H1: GPPC_H_1 */
|
||||||
PAD_CFG_GPO(GPP_H1, 0, DEEP),
|
PAD_CFG_GPO(GPP_H1, 0, DEEP),
|
||||||
|
/* H2: GPPC_H_2 */
|
||||||
PAD_CFG_GPO(GPP_H2, 0, DEEP),
|
PAD_CFG_GPO(GPP_H2, 0, DEEP),
|
||||||
|
/* H3: Not Connected */
|
||||||
PAD_NC(GPP_H3, NONE),
|
PAD_NC(GPP_H3, NONE),
|
||||||
|
/* H4: GSENSOR_I2C_SDA */
|
||||||
PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
|
PAD_CFG_NF(GPP_H4, NONE, DEEP, NF1),
|
||||||
|
/* H5: GSENSOR_I2C_SCL */
|
||||||
PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
|
PAD_CFG_NF(GPP_H5, NONE, DEEP, NF1),
|
||||||
|
/* H6: Not Connected */
|
||||||
PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1),
|
PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1),
|
||||||
|
/* H7: Not Connected */
|
||||||
PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1),
|
PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1),
|
||||||
|
/* H8: Not Connected */
|
||||||
PAD_CFG_NF(GPP_H8, NONE, DEEP, NF1),
|
PAD_CFG_NF(GPP_H8, NONE, DEEP, NF1),
|
||||||
|
/* H9: Not Connected */
|
||||||
PAD_CFG_NF(GPP_H9, NONE, DEEP, NF1),
|
PAD_CFG_NF(GPP_H9, NONE, DEEP, NF1),
|
||||||
|
/* H10: Not Connected */
|
||||||
PAD_NC(GPP_H10, NONE),
|
PAD_NC(GPP_H10, NONE),
|
||||||
|
/* H11: Not Connected */
|
||||||
PAD_NC(GPP_H11, NONE),
|
PAD_NC(GPP_H11, NONE),
|
||||||
|
/* H12: Not Connected */
|
||||||
PAD_NC(GPP_H12, NONE),
|
PAD_NC(GPP_H12, NONE),
|
||||||
|
/* H13: Not Connected */
|
||||||
PAD_NC(GPP_H13, NONE),
|
PAD_NC(GPP_H13, NONE),
|
||||||
|
/* H14: Not Connected */
|
||||||
PAD_CFG_GPO(GPP_H14, 1, PLTRST),
|
PAD_CFG_GPO(GPP_H14, 1, PLTRST),
|
||||||
|
/* H15: Not Connected */
|
||||||
PAD_NC(GPP_H15, NONE),
|
PAD_NC(GPP_H15, NONE),
|
||||||
|
/* H16: DDIB_DDC_SCL */
|
||||||
PAD_CFG_NF(GPP_H16, NONE, DEEP, NF1),
|
PAD_CFG_NF(GPP_H16, NONE, DEEP, NF1),
|
||||||
|
/* H17: DDIB_DDC_SDA */
|
||||||
PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1),
|
PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1),
|
||||||
|
/* H18: CPU_C10_GATE_N */
|
||||||
PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1),
|
PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1),
|
||||||
|
/* H19: UART_BT_WAKE_N */
|
||||||
PAD_NC(GPP_H19, NONE),
|
PAD_NC(GPP_H19, NONE),
|
||||||
|
/* H20: Not Connected */
|
||||||
PAD_NC(GPP_H20, NONE),
|
PAD_NC(GPP_H20, NONE),
|
||||||
|
/* H21: Not Connected */
|
||||||
PAD_NC(GPP_H21, NONE),
|
PAD_NC(GPP_H21, NONE),
|
||||||
|
/* H22: Not Connected */
|
||||||
PAD_NC(GPP_H22, NONE),
|
PAD_NC(GPP_H22, NONE),
|
||||||
|
/* H23: Not Connected */
|
||||||
PAD_CFG_GPO(GPP_H23, 0, DEEP),
|
PAD_CFG_GPO(GPP_H23, 0, DEEP),
|
||||||
|
|
||||||
|
/* R0: HDA_BCLK */
|
||||||
PAD_CFG_NF(GPP_R0, NONE, DEEP, NF1),
|
PAD_CFG_NF(GPP_R0, NONE, DEEP, NF1),
|
||||||
|
/* R1: HDA_SYNC */
|
||||||
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1),
|
PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1),
|
||||||
|
/* R2: HDA_SDO */
|
||||||
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1),
|
PAD_CFG_NF(GPP_R2, NATIVE, DEEP, NF1),
|
||||||
|
/* R3: HDA_SDI_0_SSP0_RXD */
|
||||||
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1),
|
PAD_CFG_NF(GPP_R3, NATIVE, DEEP, NF1),
|
||||||
|
/* R4: Not Connected */
|
||||||
PAD_CFG_NF(GPP_R4, NONE, DEEP, NF1),
|
PAD_CFG_NF(GPP_R4, NONE, DEEP, NF1),
|
||||||
|
/* R5: Not Connected */
|
||||||
PAD_CFG_GPO(GPP_R5, 0, PLTRST),
|
PAD_CFG_GPO(GPP_R5, 0, PLTRST),
|
||||||
|
/* R6: Not Connected */
|
||||||
PAD_CFG_GPO(GPP_R6, 1, PLTRST),
|
PAD_CFG_GPO(GPP_R6, 1, PLTRST),
|
||||||
|
/* R7: Not Connected */
|
||||||
PAD_NC(GPP_R7, NONE),
|
PAD_NC(GPP_R7, NONE),
|
||||||
|
|
||||||
|
/* S0: Not Connected */
|
||||||
PAD_NC(GPP_S0, NONE),
|
PAD_NC(GPP_S0, NONE),
|
||||||
|
/* S1: Not Connected */
|
||||||
PAD_NC(GPP_S1, NONE),
|
PAD_NC(GPP_S1, NONE),
|
||||||
|
/* S2: Not Connected */
|
||||||
PAD_NC(GPP_S2, NONE),
|
PAD_NC(GPP_S2, NONE),
|
||||||
|
/* S3: Not Connected */
|
||||||
PAD_NC(GPP_S3, NONE),
|
PAD_NC(GPP_S3, NONE),
|
||||||
|
/* S4: Not Connected */
|
||||||
PAD_NC(GPP_S4, NONE),
|
PAD_NC(GPP_S4, NONE),
|
||||||
|
/* S5: Not Connected */
|
||||||
PAD_NC(GPP_S5, NONE),
|
PAD_NC(GPP_S5, NONE),
|
||||||
|
/* S6: Not Connected */
|
||||||
PAD_NC(GPP_S6, NONE),
|
PAD_NC(GPP_S6, NONE),
|
||||||
|
/* S7: Not Connected */
|
||||||
PAD_NC(GPP_S7, NONE),
|
PAD_NC(GPP_S7, NONE),
|
||||||
|
|
||||||
|
/* T2: Not Connected */
|
||||||
PAD_CFG_NF(GPP_T2, DN_20K, DEEP, NF2),
|
PAD_CFG_NF(GPP_T2, DN_20K, DEEP, NF2),
|
||||||
|
/* T3: Not Connected */
|
||||||
PAD_CFG_NF(GPP_T3, DN_20K, DEEP, NF2),
|
PAD_CFG_NF(GPP_T3, DN_20K, DEEP, NF2),
|
||||||
|
|
||||||
|
/* U4: Not Connected */
|
||||||
PAD_NC(GPP_U4, NONE),
|
PAD_NC(GPP_U4, NONE),
|
||||||
|
/* U5: Not Connected */
|
||||||
PAD_NC(GPP_U5, NONE),
|
PAD_NC(GPP_U5, NONE),
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue