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mb/google/sarien: Disable unused SATA ports 

Disable SATA port 0 and port 1 as that's not used as SATA on platform.

BUG=N/A
TEST=Build and boot up fine on google arcada board.

Change-Id: I1b8801f7a0f9b7847b85d7c315fa0a2093b32f70
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/30091
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Roy Mingi Park <roy.mingi.park@intel.com>
Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
This commit is contained in:
Lijian Zhao 2018-12-06 14:16:31 -08:00 committed by Patrick Georgi
parent 2d92b1a3b1
commit 331dfaff70
1 changed files with 0 additions and 4 deletions
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4
src/mainboard/google/sarien/variants/arcada/devicetree.cb
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@ -18,11 +18,7 @@ chip soc/intel/cannonlake
register "HeciEnabled" = "1" register "HeciEnabled" = "1"
register "SataSalpSupport" = "1" register "SataSalpSupport" = "1"
register "SataMode" = "0" register "SataMode" = "0"
register "SataPortsEnable[0]" = "0"
register "SataPortsEnable[1]" = "1"
register "SataPortsEnable[2]" = "1" register "SataPortsEnable[2]" = "1"
register "SataPortsDevSlp[0]" = "0"
register "SataPortsDevSlp[1]" = "1"
register "SataPortsDevSlp[2]" = "1" register "SataPortsDevSlp[2]" = "1"
register "InternalGfx" = "1" register "InternalGfx" = "1"
register "SkipExtGfxScan" = "1" register "SkipExtGfxScan" = "1"