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This is a full rewrite of all the CS5530/CS5530A code. The previous code was 

mostly undocumented, had a broken coding style, contained lots of dead
code and had several other problems, e.g. it enabled write access to the
ROM (why?), it unconditionally enabled primary/secondary IDE (which should
have a config option) and that even _twice_ (which is um... wrong).

The new code

 - has 'ide0_enable' and 'ide1_enable' config options (which actually
   work) to enable/disable the primary/secondary IDE interface in
   Config.lb.

 - Does _not_ enable write access to the ROM (or is there some good
   reason to do that? If so, it should at least have a config option).

 - Contains a bit more documentation.

 - Uses readable (and documented) #defines instead of hardcoded magic values.

 - aaand... it actually compiles ;-) Yep, that's right. The previous code
   wouldn't even build, as it hadn't been fully ported from v1 (still used
   v1 functions which are simply not available in v2).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2775 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Uwe Hermann 2007-09-14 00:09:29 +00:00
parent 741e1e658f
commit 3335adb771
6 changed files with 255 additions and 105 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
src/southbridge/amd/cs5530/Config.lb
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@ -1,4 +1,24 @@
#config chip.h ##
## This file is part of the LinuxBIOS project.
##
## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config chip.h
driver cs5530.o driver cs5530.o
#driver cs5530_pci.o driver cs5530_isa.o
driver cs5530_ide.o driver cs5530_ide.o

31
src/southbridge/amd/cs5530/chip.h
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@ -1,12 +1,31 @@
#ifndef _SOUTHBRIDGE_AMD_CS5530 /*
#define _SOUTHBRIDGE_AMD_CS5530 * This file is part of the LinuxBIOS project.
*
* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef SOUTHBRIDGE_AMD_CS5530_CHIP_H
#define SOUTHBRIDGE_AMD_CS5530_CHIP_H
extern struct chip_operations southbridge_amd_cs5530_ops; extern struct chip_operations southbridge_amd_cs5530_ops;
struct southbridge_amd_cs5530_config { struct southbridge_amd_cs5530_config {
/* PCI function enables so the pci scan bus finds the devices */ int ide0_enable:1;
int enable_ide; int ide1_enable:1;
int enable_nvram;
}; };
#endif /* _SOUTHBRIDGE_AMD_CS5530 */ #endif /* SOUTHBRIDGE_AMD_CS5530_CHIP_H */

133
src/southbridge/amd/cs5530/cs5530.c
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@ -1,92 +1,59 @@
/*
* This file is part of the LinuxBIOS project.
*
* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h> /* Datasheet:
* - Name: Geode CS5530A I/O Companion Multi-Function South Bridge
* - URL: http://www.national.com/pf/CS/CS5530A.html
* - PDF: http://www.national.com/ds.cgi/CS/CS5530A.pdf
* - Revision: 1.1 (May 2001)
*/
/* Datasheet:
* - Name: AMD Geode CS5530A Companion Device Data Book
* - URL: http://www.amd.com/us-en/ConnectivitySolutions/ProductInformation/0,,50_2330_9863_9919,00.html
* - PDF: http://www.amd.com/files/connectivitysolutions/geode/5530a_db_v11.pdf
* - Date: October 2003
* - Publication ID: May 2001, Revision 1.1
*/
/* Datasheet:
* - Name: AMD Geode Solutions
* Integrated Processors, Companion Devices, and System Platforms
* (Geode CS5530 I/O Companion Multi-Function South Bridge)
* - URL: http://www.amd.com/us-en/ConnectivitySolutions/ProductInformation/0,,50_2330_9863_9919,00.html
* - PDF: http://www.amd.com/files/connectivitysolutions/geode/5530_db_v41.pdf
* - Date: September 2004
*/
/* Note: The CS3350 / CS3350A are mostly identical. This code handles both. */
#include <console/console.h>
#include <device/device.h> #include <device/device.h>
#include <device/pci.h> #include <device/pci.h>
#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include <console/console.h>
#include "cs5530.h" #include "cs5530.h"
static void nvram_on(struct device *dev) void cs5530_enable(device_t dev)
{ {
#if 0
volatile char *flash = (volatile unsigned char *)0xFFFc0000;
unsigned char id1, id2;
#endif
unsigned char reg;
/* Enable writes to flash at top of memory */
pci_write_config8(dev, 0x52, 0xee);
/* Set positive decode on ROM */
/* Also, there is no apparent reason to turn off the devoce on the */
/* IDE devices */
reg = pci_read_config8(dev, 0x5b);
reg |= 1 << 5; /* ROM Decode */
reg |= 1 << 3; /* Primary IDE decode */
reg |= 1 << 4; /* Secondary IDE decode */
pci_write_config8(dev, 0x5b, reg);
#if 0 // just to test if the flash is accessible!
*(flash + 0x555) = 0xaa;
*(flash + 0x2aa) = 0x55;
*(flash + 0x555) = 0x90;
id1 = *(volatile unsigned char *) flash;
id2 = *(volatile unsigned char *) (flash + 1);
*flash = 0xf0;
printk_debug("Flash device: MFGID %02x, DEVID %02x\n", id1, id2);
#endif
} }
struct chip_operations southbridge_amd_cs5530_ops = {
static void southbridge_init(struct device *dev) CHIP_NAME("AMD Geode CS5530/CS5530A I/O Companion Southbridge")
{ .enable_dev = cs5530_enable,
printk_spew("cs5530: %s\n", __FUNCTION__);
nvram_on(dev);
}
/*
static void dump_south(struct device *dev)
{
int i, j;
for(i=0; i<256; i+=16) {
printk_debug("0x%02x: ", i);
for(j=0; j<16; j++)
printk_debug("%02x ", pci_read_config8(dev, i+j));
printk_debug("\n");
}
}
*/
static void southbridge_enable(struct device *dev)
{
printk_spew("%s: dev is %p\n", __FUNCTION__, dev);
}
static void cs5530_pci_dev_enable_resources(device_t dev)
{
printk_spew("cs5530.c: %s()\n", __FUNCTION__);
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
static struct device_operations southbridge_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = cs5530_pci_dev_enable_resources,
.init = southbridge_init,
.enable = southbridge_enable,
.scan_bus = scan_static_bus,
};
static struct pci_driver cs5530_pci_driver __pci_driver = {
.ops = &southbridge_ops,
.vendor = PCI_VENDOR_ID_CYRIX,
.device = PCI_DEVICE_ID_CYRIX_5530_LEGACY,
}; };

40
src/southbridge/amd/cs5530/cs5530.h
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@ -1,4 +1,40 @@
#ifndef _CS5530_H /*
#define _CS5530_H * This file is part of the LinuxBIOS project.
*
* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef SOUTHBRIDGE_AMD_CS5530_CS5530_H
#define SOUTHBRIDGE_AMD_CS5530_CS5530_H
#ifndef __ROMCC__
#include "chip.h"
void cs5530_enable(device_t dev);
#endif #endif
#define DECODE_CONTROL_REG2 0x5b /* F0 index 0x5b */
/* Selects PCI positive decoding for accesses to the configured ROM space. */
#define BIOS_ROM_POSITIVE_DECODE (1 << 5)
/* Primary IDE Controller Positive Decode (i.e., enable it). */
#define PRIMARY_IDE_ENABLE (1 << 3)
/* Secondary IDE Controller Positive Decode (i.e., enable it). */
#define SECONDARY_IDE_ENABLE (1 << 4)
#endif /* SOUTHBRIDGE_AMD_CS5530_CS5530_H */

62
src/southbridge/amd/cs5530/cs5530_ide.c
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@ -1,18 +1,64 @@
/*
* This file is part of the LinuxBIOS project.
*
* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h> #include <console/console.h>
#include <device/device.h> #include <device/device.h>
#include <device/pci.h> #include <device/pci.h>
#include <device/pci_ids.h> #include <device/pci_ids.h>
#include <device/pci_ops.h>
#include "cs5530.h" #include "cs5530.h"
/**
* Initialize the IDE controller.
*
* Depending on the configuration variables 'ide0_enable' and 'ide1_enable'
* enable or disable the primary and secondary IDE interface, respectively.
*
* @param dev The device to use.
*/
static void ide_init(struct device *dev) static void ide_init(struct device *dev)
{ {
printk_spew("cs5530_ide: %s\n", __FUNCTION__); uint8_t reg8;
} struct southbridge_amd_cs5530_config *conf = dev->chip_info;
static void ide_enable(struct device *dev) reg8 = pci_read_config8(dev, DECODE_CONTROL_REG2);
{
printk_spew("cs5530_ide: %s\n", __FUNCTION__); /* Enable/disable the primary IDE interface. */
if (conf->ide0_enable) {
reg8 |= PRIMARY_IDE_ENABLE;
} else {
reg8 &= ~(PRIMARY_IDE_ENABLE);
}
/* Enable/disable the secondary IDE interface. */
if (conf->ide1_enable) {
reg8 |= SECONDARY_IDE_ENABLE;
} else {
reg8 &= ~(SECONDARY_IDE_ENABLE);
}
pci_write_config8(dev, DECODE_CONTROL_REG2, reg8);
printk_info("%s IDE interface %s\n", "Primary",
conf->ide0_enable ? "enabled" : "disabled");
printk_info("%s IDE interface %s\n", "Secondary",
conf->ide1_enable ? "enabled" : "disabled");
} }
static struct device_operations ide_ops = { static struct device_operations ide_ops = {
@ -20,7 +66,9 @@ static struct device_operations ide_ops = {
.set_resources = pci_dev_set_resources, .set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources, .enable_resources = pci_dev_enable_resources,
.init = ide_init, .init = ide_init,
.enable = ide_enable, .enable = 0,
.scan_bus = scan_static_bus,
.ops_pci = 0,
}; };
static struct pci_driver ide_driver __pci_driver = { static struct pci_driver ide_driver __pci_driver = {

60
src/southbridge/amd/cs5530/cs5530_isa.c Normal file
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@ -0,0 +1,60 @@
/*
* This file is part of the LinuxBIOS project.
*
* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <arch/io.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include "cs5530.h"
static void isa_init(struct device *dev)
{
uint8_t reg8;
// TODO: Test if needed, otherwise drop.
/* Set positive decode on ROM. */
reg8 = pci_read_config8(dev, DECODE_CONTROL_REG2);
reg8 |= BIOS_ROM_POSITIVE_DECODE;
pci_write_config8(dev, DECODE_CONTROL_REG2, reg8);
}
static void cs5530_pci_dev_enable_resources(device_t dev)
{
// TODO: Needed?
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
static struct device_operations isa_ops = {
.read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = cs5530_pci_dev_enable_resources,
.init = isa_init,
.enable = 0,
.scan_bus = scan_static_bus,
};
static struct pci_driver isa_driver __pci_driver = {
.ops = &isa_ops,
.vendor = PCI_VENDOR_ID_CYRIX,
.device = PCI_DEVICE_ID_CYRIX_5530_LEGACY,
};