mb/asus/p2b/dsdt.asl: Align POST code ASL stuff

Align POST code ASL elements with existing code in newer southbridges.
The main differences are that `NoLock` is changed to `Lock`, and that
names have been changed. The lock type change should not be a problem
because the field is only used once in the _PTS method.

Change-Id: I8aa362007ff98e5b42add6c7908a8f7beac2222b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63987
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>

src/mainboard/asus/p2b/dsdt.asl

@@ -22,10 +22,12 @@ DefinitionBlock (
 	#include <acpi/dsdt_top.asl>
 	/* \_SB scope defining the main processor is generated in SSDT. */
 
-	OperationRegion(X80, SystemIO, 0x80, 1)
-	Field(X80, ByteAcc, NoLock, Preserve)
+	/* Port 80 POST */
+
+	OperationRegion (POST, SystemIO, 0x80, 1)
+	Field (POST, ByteAcc, Lock, Preserve)
 	{
-		P80, 8
+		DBG0, 8
 	}
 
 	/*
@@ -77,7 +79,7 @@ DefinitionBlock (
 		/* Arms SMI for device 12 */
 		TO12 = 1
 		/* Put out a POST code */
-		P80 = Arg0 | 0xF0
+		DBG0 = Arg0 | 0xF0
 	}
 
 	Method (\_WAK, 1, NotSerialized)