mb/*/*: Use proper header for pm_iowrite()

These boards don't include any from sb/amd/sb800.

Change-Id: I2dbe39df6e4c5a86a0714b396bb89b03bbafd164
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36987
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Arthur Heymans 2019-11-20 05:06:18 +01:00 committed by Kyösti Mälkki
parent 24284270c7
commit 334699d205
6 changed files with 6 additions and 6 deletions

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@ -15,7 +15,7 @@
#include <console/console.h>
#include <device/device.h>
#include <southbridge/amd/sb800/sb800.h>
#include <southbridge/amd/cimx/cimx_util.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h> /* Platform Specific Definitions */
static void init_gpios(void)

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@ -16,7 +16,7 @@
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
#include <southbridge/amd/sb800/sb800.h>
#include <southbridge/amd/cimx/cimx_util.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h> /* Platform Specific Definitions */
/**

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@ -15,7 +15,7 @@
#include <console/console.h>
#include <device/device.h>
#include <southbridge/amd/sb800/sb800.h>
#include <southbridge/amd/cimx/cimx_util.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h> /* Platform Specific Definitions */
/**********************************************

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@ -20,7 +20,7 @@
#include <device/device.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <southbridge/amd/sb800/sb800.h>
#include <southbridge/amd/cimx/cimx_util.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
/**********************************************

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@ -21,7 +21,7 @@
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb800/sb800.h>
#include <southbridge/amd/cimx/cimx_util.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
#include <vendorcode/amd/cimx/sb800/OEM.h> /* SMBUS0_BASE_ADDRESS */
#include <southbridge/amd/cimx/sb800/gpio_oem.h>

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@ -20,7 +20,7 @@
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <southbridge/amd/sb800/sb800.h>
#include <southbridge/amd/cimx/cimx_util.h>
#include <southbridge/amd/cimx/sb800/SBPLATFORM.h>
#include <vendorcode/amd/cimx/sb800/OEM.h> /* SMBUS0_BASE_ADDRESS */
#include <southbridge/amd/cimx/sb800/gpio_oem.h>