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mb/siemens/mc_ehl4: Enable SD card

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This mainboard has SD slot available and therefore it should be enabled.
Use the same SD card configuration as for mc_ehl2 mainboard.

Change-Id: Icd9b25301311679cf93b05ba83a24e551261a020
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74653
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
This commit is contained in:
Mario Scheithauer 2023-04-04 14:41:44 +02:00 committed by Felix Held
parent 1dff52556e
commit 3362773a5b
3 changed files with 43 additions and 0 deletions
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1
src/mainboard/siemens/mc_ehl/variants/mc_ehl4/Makefile.inc
View file

@ -3,5 +3,6 @@
bootblock-y += gpio.c
romstage-y += memory.c
ramstage-y += gpio.c
ramstage-y += mainboard.c
all-$(CONFIG_NC_FPGA_POST_CODE) += post.c

3
src/mainboard/siemens/mc_ehl/variants/mc_ehl4/devicetree.cb
View file

@ -89,6 +89,8 @@ chip soc/intel/elkhartlake
register "ScsEmmcHs400Enabled" = "0"
register "ScsEmmcDdr50Enabled" = "1"
register "SdCardPowerEnableActiveHigh" = "1"
# GPIO for SD card detect
register "sdcard_cd_gpio" = "GPP_G5"
# LPSS Serial IO (I2C/UART/GSPI) related UPDs
register "SerialIoI2cMode" = "{
@ -171,6 +173,7 @@ chip soc/intel/elkhartlake
device pci 19.2 on end # UART2
device pci 1a.0 on end # eMMC
device pci 1a.1 on end # SD
device pci 1c.0 on end # RP1 (pcie0 single VC)
device pci 1c.1 on end # RP2 (pcie0 single VC)

39
src/mainboard/siemens/mc_ehl/variants/mc_ehl4/mainboard.c Normal file
View file

@ -0,0 +1,39 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <baseboard/variants.h>
#include <bootstate.h>
#include <device/pci_ids.h>
#include <gpio.h>
#include <intelblocks/pcr.h>
#include <soc/pci_devs.h>
#include <soc/pcr_ids.h>
#define HOSTCTRL2 0x3E
#define HOSTCTRL2_PRESET (1 << 15)
#define SD_CAP_BYP 0x810
#define SD_CAP_BYP_EN 0x5A
#define SD_CAP_BYP_REG1 0x814
#define SD_CAP_BYP_SDR50 (1 << 13)
#define SD_CAP_BYP_SDR104 (1 << 14)
#define SD_CAP_BYP_DDR50 (1 << 15)
void variant_mainboard_final(void)
{
struct device *dev;
/* Limit SD card speed to DDR50 mode to avoid SDR104/SDR50 modes due to
layout limitations. */
dev = pcidev_path_on_root(PCH_DEVFN_SDCARD);
if (dev) {
struct resource *res = probe_resource(dev, PCI_BASE_ADDRESS_0);
if (!res)
return;
write32(res2mmio(res, SD_CAP_BYP, 0), SD_CAP_BYP_EN);
clrsetbits32(res2mmio(res, SD_CAP_BYP_REG1, 0),
SD_CAP_BYP_SDR104 | SD_CAP_BYP_SDR50,
SD_CAP_BYP_DDR50);
/* Use preset driver strength from preset value registers. */
clrsetbits16(res2mmio(res, HOSTCTRL2, 0), 0, HOSTCTRL2_PRESET);
}
}