biostar/a68n_5200: Switch away from ROMCC_BOOTBLOCK

Following the example of change CB:37737 (ee8f969).
Switching was done by moving a SIO configuration and
the clocks setup from 'romstage.c' to 'bootblock.c'.

Tested-by: Damien Zammit <damien@zamaudio.com>
Signed-off-by: Mike Banon <mikebdp2@gmail.com>
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Change-Id: I2e710ac61843c09a055523c7971e4c05bae56a37
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37872
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Mike Banon 2019-12-20 11:08:35 +03:00 committed by Kyösti Mälkki
parent 73692e8b77
commit 33768dd08b
5 changed files with 14 additions and 15 deletions

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@ -15,14 +15,10 @@
# GNU General Public License for more details.
#
config BOARD_BIOSTAR_A68N5200
def_bool n
if BOARD_BIOSTAR_A68N5200
config BOARD_SPECIFIC_OPTIONS
def_bool y
#select ROMCC_BOOTBLOCK
select CPU_AMD_AGESA_FAMILY16_KB
select NORTHBRIDGE_AMD_AGESA_FAMILY16_KB
select SOUTHBRIDGE_AMD_AGESA_YANGTZE

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@ -1,2 +1,2 @@
#config BOARD_BIOSTAR_A68N5200
# bool"A68N-5200"
config BOARD_BIOSTAR_A68N5200
bool "A68N-5200"

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@ -13,6 +13,8 @@
# GNU General Public License for more details.
#
bootblock-y += bootblock.c
romstage-y += buildOpts.c
romstage-y += BiosCallOuts.c
romstage-y += OemCustomize.c

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@ -15,14 +15,10 @@
* GNU General Public License for more details.
*/
#include <amdblocks/acpimmio.h>
#include <bootblock_common.h>
#include <stdint.h>
#include <amdblocks/acpimmio.h>
#include <device/pci_def.h>
#include <arch/io.h>
#include <device/pci_ops.h>
#include <northbridge/amd/agesa/state_machine.h>
#include <southbridge/amd/agesa/hudson/hudson.h>
#include <amdblocks/acpimmio.h>
#include <superio/ite/common/ite.h>
#include <superio/ite/it8728f/it8728f.h>
@ -32,18 +28,20 @@
static void sbxxx_enable_48mhzout(void)
{
/* most likely programming to 48MHz out signal */
u32 reg32;
/* Set auxiliary output clock frequency on OSCOUT1 pin to be 48MHz */
reg32 = misc_read32(0x28);
reg32 &= 0xfff8ffff;
misc_write32(0x28, reg32);
/* Enable Auxiliary Clock1, disable FCH 14 MHz OscClk */
reg32 = misc_read32(0x40);
reg32 &= 0xffffbffb;
misc_write32(0x40, reg32);
}
void board_BeforeAgesa(struct sysinfo *cb)
void bootblock_mainboard_early_init(void)
{
u8 byte;
@ -64,8 +62,10 @@ void board_BeforeAgesa(struct sysinfo *cb)
byte |= (1 << 6); /* 0x3f8 */
pci_write_config8(dev, 0x44, byte);
/* run ite */
/* enable SIO clock */
sbxxx_enable_48mhzout();
/* Enable serial output on it8728f */
ite_conf_clkin(CLKIN_DEV, ITE_UART_CLK_PREDIVIDE_48);
ite_kill_watchdog(GPIO_DEV);
ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);

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@ -16,6 +16,7 @@
#include <console/console.h>
#include <string.h>
#include <stdint.h>
#include <device/pci_def.h>
#include <arch/pirq_routing.h>
static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,