biostar/a68n_5200: Switch away from ROMCC_BOOTBLOCK
Following the example of change CB:37737 (ee8f969
).
Switching was done by moving a SIO configuration and
the clocks setup from 'romstage.c' to 'bootblock.c'.
Tested-by: Damien Zammit <damien@zamaudio.com>
Signed-off-by: Mike Banon <mikebdp2@gmail.com>
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Change-Id: I2e710ac61843c09a055523c7971e4c05bae56a37
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37872
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
parent
73692e8b77
commit
33768dd08b
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@ -15,14 +15,10 @@
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# GNU General Public License for more details.
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#
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config BOARD_BIOSTAR_A68N5200
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def_bool n
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if BOARD_BIOSTAR_A68N5200
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config BOARD_SPECIFIC_OPTIONS
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def_bool y
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#select ROMCC_BOOTBLOCK
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select CPU_AMD_AGESA_FAMILY16_KB
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select NORTHBRIDGE_AMD_AGESA_FAMILY16_KB
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select SOUTHBRIDGE_AMD_AGESA_YANGTZE
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@ -1,2 +1,2 @@
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#config BOARD_BIOSTAR_A68N5200
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# bool"A68N-5200"
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config BOARD_BIOSTAR_A68N5200
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bool "A68N-5200"
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@ -13,6 +13,8 @@
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# GNU General Public License for more details.
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#
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bootblock-y += bootblock.c
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += OemCustomize.c
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@ -15,14 +15,10 @@
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* GNU General Public License for more details.
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*/
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#include <amdblocks/acpimmio.h>
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#include <bootblock_common.h>
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#include <stdint.h>
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#include <amdblocks/acpimmio.h>
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#include <device/pci_def.h>
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#include <arch/io.h>
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#include <device/pci_ops.h>
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#include <northbridge/amd/agesa/state_machine.h>
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#include <southbridge/amd/agesa/hudson/hudson.h>
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#include <amdblocks/acpimmio.h>
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#include <superio/ite/common/ite.h>
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#include <superio/ite/it8728f/it8728f.h>
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@ -32,18 +28,20 @@
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static void sbxxx_enable_48mhzout(void)
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{
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/* most likely programming to 48MHz out signal */
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u32 reg32;
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/* Set auxiliary output clock frequency on OSCOUT1 pin to be 48MHz */
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reg32 = misc_read32(0x28);
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reg32 &= 0xfff8ffff;
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misc_write32(0x28, reg32);
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/* Enable Auxiliary Clock1, disable FCH 14 MHz OscClk */
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reg32 = misc_read32(0x40);
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reg32 &= 0xffffbffb;
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misc_write32(0x40, reg32);
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}
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void board_BeforeAgesa(struct sysinfo *cb)
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void bootblock_mainboard_early_init(void)
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{
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u8 byte;
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@ -64,8 +62,10 @@ void board_BeforeAgesa(struct sysinfo *cb)
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byte |= (1 << 6); /* 0x3f8 */
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pci_write_config8(dev, 0x44, byte);
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/* run ite */
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/* enable SIO clock */
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sbxxx_enable_48mhzout();
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/* Enable serial output on it8728f */
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ite_conf_clkin(CLKIN_DEV, ITE_UART_CLK_PREDIVIDE_48);
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ite_kill_watchdog(GPIO_DEV);
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ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
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@ -16,6 +16,7 @@
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#include <console/console.h>
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#include <string.h>
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#include <stdint.h>
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#include <device/pci_def.h>
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#include <arch/pirq_routing.h>
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static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
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