arm64: make mmu_enable() use previous ttb from mmu_init()
No need to pass in the same value for the ttb after just calling mmu_init(). All current users are setting this once and forgetting it. BUG=chrome-os-partner:31545 BRANCH=None TEST=Built and booted on ryu. Change-Id: Ie446d16eaf4ea65a34a9c76dd7c6c2f9b19c5d57 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: bd77461d483b513a569365673c83badc752f4aa8 Original-Change-Id: I54c7e4892d44ea6129429d8a46461d089dd8e2a9 Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/214772 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/9016 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -285,7 +285,7 @@ static uint32_t is_mmu_enabled(void)
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return (sctlr & SCTLR_M);
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}
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void mmu_enable(uint64_t ttbr)
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void mmu_enable(void)
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{
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uint32_t sctlr;
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@ -301,7 +301,7 @@ void mmu_enable(uint64_t ttbr)
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TCR_TBI_USED);
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/* Initialize TTBR */
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raw_write_ttbr0_el3(ttbr);
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raw_write_ttbr0_el3((uintptr_t)xlat_addr);
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/* Ensure all translation table writes are committed before enabling MMU */
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dsb();
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@ -162,7 +162,9 @@
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#define TCR_TBI_USED (0x0 << TCR_TBI_SHIFT)
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#define TCR_TBI_IGNORED (0x1 << TCR_TBI_SHIFT)
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void mmu_init(struct memranges *,uint64_t *,uint64_t);
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void mmu_enable(uint64_t);
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/* Initialize the MMU TTB tables provide the range sequence and ttb buffer. */
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void mmu_init(struct memranges *ranges, uint64_t *ttb, uint64_t ttb_size);
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/* Enable the mmu based on previous mmu_init(). */
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void mmu_enable(void);
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#endif // __ARCH_ARM64_MMU_H__
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@ -95,5 +95,5 @@ void tegra132_mmu_init(void)
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tz_base_mib *= MiB;
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ttb_size_mib = TTB_SIZE * MiB;
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mmu_init(map, (void *)tz_base_mib, ttb_size_mib);
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mmu_enable(tz_base_mib);
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mmu_enable();
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}
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