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AGESA,binaryPI: Add compatibility wrapper for romstage entry 

This simplifies transition and reviews towards C environment
bootblock by allowing single cache_as_ram.S file to be used.

Change-Id: I231972982e5ca6d0c08437693edf926b0eaf9ee1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37352
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki 2019-11-29 06:38:46 +02:00
parent 3aa17f7604
commit 33d0fb8d34
4 changed files with 30 additions and 26 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

25
src/drivers/amd/agesa/cache_as_ram.S
View File

@ -30,9 +30,6 @@
_cache_as_ram_setup: _cache_as_ram_setup:
/* Preserve BIST. */
movd %eax, %mm0
post_code(0xa0) post_code(0xa0)
AMD_ENABLE_STACK AMD_ENABLE_STACK
@ -50,16 +47,16 @@ _cache_as_ram_setup:
mov $_ecar_stack, %esp mov $_ecar_stack, %esp
/* Align the stack. */ /* Align the stack and keep aligned for call to bootblock_c_entry() */
and $0xFFFFFFF0, %esp and $0xfffffff0, %esp
sub $8, %esp
/* Must maintain 16-byte stack alignment here. */ pushl $0 /* tsc[63:32] */
pushl $0x0 pushl $0 /* tsc[31:0] */
pushl $0x0
pushl $0x0 post_code(0xa2)
movd %mm0, %eax /* bist */
pushl %eax call bootblock_c_entry
call romstage_main
/* Never reached. */ /* Never reached. */
@ -69,9 +66,9 @@ stop:
jmp stop jmp stop
ap_entry: ap_entry:
/* Align the stack for call to ap_romstage_main() */ /* Align the stack for call to ap_bootblock_c_entry() */
and $0xfffffff0, %esp and $0xfffffff0, %esp
call ap_romstage_main call ap_bootblock_c_entry
/* Never reached. */ /* Never reached. */
jmp stop jmp stop

19
src/drivers/amd/agesa/romstage.c
View File

@ -14,8 +14,8 @@
#include <arch/acpi.h> #include <arch/acpi.h>
#include <arch/cpu.h> #include <arch/cpu.h>
#include <arch/romstage.h> #include <arch/romstage.h>
#include <bootblock_common.h>
#include <cbmem.h> #include <cbmem.h>
#include <cpu/amd/car.h>
#include <console/console.h> #include <console/console.h>
#include <halt.h> #include <halt.h>
#include <program_loading.h> #include <program_loading.h>
@ -39,7 +39,7 @@ static void fill_sysinfo(struct sysinfo *cb)
agesa_set_interface(cb); agesa_set_interface(cb);
} }
asmlinkage void romstage_main(unsigned long bist) static void romstage_main(void)
{ {
struct postcar_frame pcf; struct postcar_frame pcf;
struct sysinfo romstage_state; struct sysinfo romstage_state;
@ -99,7 +99,7 @@ asmlinkage void romstage_main(unsigned long bist)
/* We do not return. */ /* We do not return. */
} }
asmlinkage void ap_romstage_main(void) static void ap_romstage_main(void)
{ {
struct sysinfo romstage_state; struct sysinfo romstage_state;
struct sysinfo *cb = &romstage_state; struct sysinfo *cb = &romstage_state;
@ -116,3 +116,16 @@ asmlinkage void ap_romstage_main(void)
/* Not reached. */ /* Not reached. */
halt(); halt();
} }
/* This wrapper enables easy transition away from ROMCC_BOOTBLOCK
* keeping changes in cache_as_ram.S easy to manage.
*/
asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
{
romstage_main();
}
asmlinkage void ap_bootblock_c_entry(void)
{
ap_romstage_main();
}

3
src/include/bootblock_common.h
View File

@ -38,6 +38,9 @@ void bootblock_soc_init(void);
asmlinkage void bootblock_c_entry(uint64_t base_timestamp); asmlinkage void bootblock_c_entry(uint64_t base_timestamp);
asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist); asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist);
/* To be used when APs execute through bootblock too. */
asmlinkage void ap_bootblock_c_entry(void);
void bootblock_main_with_basetime(uint64_t base_timestamp); void bootblock_main_with_basetime(uint64_t base_timestamp);
/* This is the argument structure passed from decompressor to bootblock. */ /* This is the argument structure passed from decompressor to bootblock. */

9
src/include/cpu/amd/car.h
View File

@ -1,9 +0,0 @@
#ifndef _CPU_AMD_CAR_H
#define _CPU_AMD_CAR_H
#include <arch/cpu.h>
asmlinkage void romstage_main(unsigned long bist);
asmlinkage void ap_romstage_main(void);
#endif