AGESA,binaryPI: Add compatibility wrapper for romstage entry
This simplifies transition and reviews towards C environment bootblock by allowing single cache_as_ram.S file to be used. Change-Id: I231972982e5ca6d0c08437693edf926b0eaf9ee1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37352 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -30,9 +30,6 @@
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_cache_as_ram_setup:
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/* Preserve BIST. */
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movd %eax, %mm0
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post_code(0xa0)
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AMD_ENABLE_STACK
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@ -50,16 +47,16 @@ _cache_as_ram_setup:
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mov $_ecar_stack, %esp
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/* Align the stack. */
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and $0xFFFFFFF0, %esp
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/* Align the stack and keep aligned for call to bootblock_c_entry() */
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and $0xfffffff0, %esp
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sub $8, %esp
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/* Must maintain 16-byte stack alignment here. */
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pushl $0x0
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pushl $0x0
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pushl $0x0
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movd %mm0, %eax /* bist */
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pushl %eax
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call romstage_main
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pushl $0 /* tsc[63:32] */
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pushl $0 /* tsc[31:0] */
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post_code(0xa2)
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call bootblock_c_entry
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/* Never reached. */
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@ -69,9 +66,9 @@ stop:
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jmp stop
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ap_entry:
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/* Align the stack for call to ap_romstage_main() */
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/* Align the stack for call to ap_bootblock_c_entry() */
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and $0xfffffff0, %esp
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call ap_romstage_main
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call ap_bootblock_c_entry
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/* Never reached. */
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jmp stop
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@ -14,8 +14,8 @@
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#include <arch/acpi.h>
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#include <arch/cpu.h>
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#include <arch/romstage.h>
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#include <bootblock_common.h>
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#include <cbmem.h>
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#include <cpu/amd/car.h>
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#include <console/console.h>
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#include <halt.h>
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#include <program_loading.h>
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@ -39,7 +39,7 @@ static void fill_sysinfo(struct sysinfo *cb)
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agesa_set_interface(cb);
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}
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asmlinkage void romstage_main(unsigned long bist)
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static void romstage_main(void)
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{
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struct postcar_frame pcf;
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struct sysinfo romstage_state;
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@ -99,7 +99,7 @@ asmlinkage void romstage_main(unsigned long bist)
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/* We do not return. */
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}
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asmlinkage void ap_romstage_main(void)
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static void ap_romstage_main(void)
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{
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struct sysinfo romstage_state;
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struct sysinfo *cb = &romstage_state;
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@ -116,3 +116,16 @@ asmlinkage void ap_romstage_main(void)
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/* Not reached. */
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halt();
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}
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/* This wrapper enables easy transition away from ROMCC_BOOTBLOCK
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* keeping changes in cache_as_ram.S easy to manage.
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*/
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asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
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{
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romstage_main();
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}
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asmlinkage void ap_bootblock_c_entry(void)
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{
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ap_romstage_main();
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}
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@ -38,6 +38,9 @@ void bootblock_soc_init(void);
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asmlinkage void bootblock_c_entry(uint64_t base_timestamp);
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asmlinkage void bootblock_c_entry_bist(uint64_t base_timestamp, uint32_t bist);
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/* To be used when APs execute through bootblock too. */
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asmlinkage void ap_bootblock_c_entry(void);
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void bootblock_main_with_basetime(uint64_t base_timestamp);
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/* This is the argument structure passed from decompressor to bootblock. */
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@ -1,9 +0,0 @@
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#ifndef _CPU_AMD_CAR_H
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#define _CPU_AMD_CAR_H
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#include <arch/cpu.h>
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asmlinkage void romstage_main(unsigned long bist);
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asmlinkage void ap_romstage_main(void);
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#endif
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