amd/stoneyridge: Remove unused registers from ASL
Remove AcpiMmio and PCI config registers that are not used. TEST=build Grunt BUG=b:77602074 Change-Id: I62f40e421eba41c4a49d85efc975096171cb72fa Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/28864 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Martin Roth <martinroth@google.com>
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@ -309,12 +309,6 @@ Field( SMIC, ByteAcc, NoLock, Preserve) {
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, 4,
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U3SR, 1, /* USB3 23 Shadow Reg Request Status Register */
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SDSR, 1, /* SD 24 Shadow Reg Request Status Register */
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offset (0x1e88),
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SRSA, 32, /* Shadow Reg SRAM Addr */
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SRSD, 32, /* Shadow Reg SRAM DATA */
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offset (0x1e94),
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SRDY, 1, /* S0i3 bios ready */
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offset (0x1ea0),
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PG1A, 1,
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@ -341,40 +335,6 @@ Field(FCFG, DwordAcc, NoLock, Preserve)
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Offset(0x00080054),
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U_PS, 2,
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/* SATA */
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Offset(0x00088010),
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ST10, 32,
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ST14, 32,
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ST18, 32,
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ST1C, 32,
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ST20, 32,
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ST24, 32,
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Offset(0x0008802c),
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ST2C, 32,
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Offset(0x00088040),
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ST40, 1,
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Offset(0x00088044),
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ST44, 1,
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Offset(0x0008804c),
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, 2,
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DDIC, 1, /* DisableDynamicInterfaceClockPowerSaving */
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Offset(0x00088064),
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S_PS, 2,
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Offset(0x00088084),
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, 1,
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ST84, 1,
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, 28,
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DSDN, 1, /* DShutDowN */
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Offset(0x0008808c),
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ST8C, 8,
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/* EHCI */
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Offset(0x00090004),
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, 1,
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@ -392,40 +352,9 @@ Field(FCFG, DwordAcc, NoLock, Preserve)
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E_PS, 2,
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/* LPC Bridge */
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Offset(0x000a3078),
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, 2,
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LDQ0, 1,
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Offset(0x000a30cb),
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, 7,
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AUSS, 1, /* AutoSizeStart */
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/* SD */
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Offset(0x000a7004),
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, 1,
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SDME, 1,
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Offset(0x000a7010),
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SDBA, 32,
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Offset(0x000a702c),
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SD2C, 32,
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Offset(0x000a7094),
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D_PS, 2,
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, 6,
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SDPE, 1,
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, 6,
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PMES, 1,
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Offset(0x000a70b3), /* Version 2.0 = 0x1, Version 3.0 = 0x2 */
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SDB3, 8,
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Offset(0x000a70b4), /* Set Enable */
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, 8,
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SETE, 1,
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Offset(0x000a70d0),
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, 17,
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FC18, 1, /* Force 1.8v */
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}
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/*
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