From 33eaf3a715e258597ca7924c94739433a343d1e6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Fri, 6 Jun 2014 21:46:47 +0300 Subject: [PATCH] superio/smscsuperio: Fix chip detection MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit There was dereference of NULL dev->ops in pnp_enter/exit_conf_mode() as those calls were made before pnp_enable_devices() was run. Since hardware did not enter configuration mode, detection failed with ID and REV read as 0xff. Change-Id: If13086707cd86e392890ccf4f717e13a87f3317f Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/5949 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/superio/smsc/smscsuperio/superio.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/superio/smsc/smscsuperio/superio.c b/src/superio/smsc/smscsuperio/superio.c index 0d62a9a1e8..92cae86d77 100644 --- a/src/superio/smsc/smscsuperio/superio.c +++ b/src/superio/smsc/smscsuperio/superio.c @@ -231,11 +231,12 @@ static void enable_dev(device_t dev) u8 test7; if (first_time) { + + pnp_enter_conf_mode_55(dev); + /* Read the device ID and revision of the Super I/O chip. */ - pnp_enter_conf_mode(dev); superio_id = pnp_read_config(dev, DEVICE_ID_REG); superio_rev = pnp_read_config(dev, DEVICE_REV_REG); - pnp_exit_conf_mode(dev); /* TODO: Error handling? */ @@ -257,6 +258,8 @@ static void enable_dev(device_t dev) test7 |= (1 << 0); pnp_write_config(dev, DEVICE_TEST7_REG, test7); } + + pnp_exit_conf_mode_aa(dev); } /* Find the correct Super I/O. */