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Random Winbond Super I/O cosmetic and coding-style fixes. 

- Whitespace, coding style, and typo fixes.

 - Drop unused/obsolete "#config chip.h".

 - Use u8/u16/etc. everywhere.

 - Use pnp_read_config()/pnp_write_config() instead of open-coding them.

 - Use pnp_set_logical_device() instead of open-coding it.

 - W83627EHG: Fix incorrect enable_hwm_smbus() code comment.

 - Use ARRAY_SIZE.

 - w83627hf/superio.c: w83627hf_16_bit_addr_qual(): Bugfix, the code was using
   'dev->path.pnp.port >> 8' as config port, which is incorrect in superio.c
   (which has a "real" device_t struct, in contrast to *_early_serial.c which
   uses "unsigned" as device_t where 'dev >> 8' is required).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6057 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Uwe Hermann 2010-11-10 14:53:36 +00:00
parent 02d66fd1bf
commit 340fa9396b
39 changed files with 221 additions and 245 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/superio/winbond/w83627dhg/Makefile.inc
View File

@ -18,5 +18,5 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
#config chip.h
ramstage-$(CONFIG_SUPERIO_WINBOND_W83627DHG) += superio.c

4
src/superio/winbond/w83627dhg/superio.c
View File

@ -39,14 +39,12 @@ static void pnp_exit_ext_func_mode(device_t dev)
static void w83627dhg_init(device_t dev)
{
struct superio_winbond_w83627dhg_config *conf;
struct superio_winbond_w83627dhg_config *conf = dev->chip_info;
struct resource *res0, *res1;
if (!dev->enabled)
return;
conf = dev->chip_info;
switch(dev->path.pnp.device) {
case W83627DHG_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);

2
src/superio/winbond/w83627ehg/Makefile.inc
View File

@ -19,5 +19,5 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
#config chip.h
ramstage-$(CONFIG_SUPERIO_WINBOND_W83627EHG) += superio.c

61
src/superio/winbond/w83627ehg/superio.c
View File

@ -45,54 +45,53 @@ static void pnp_exit_ext_func_mode(device_t dev)
outb(0xaa, dev->path.pnp.port);
}
static void pnp_write_index(unsigned long port_base, uint8_t reg, uint8_t value)
static void pnp_write_index(u16 port, u8 reg, u8 value)
{
outb(reg, port_base);
outb(value, port_base + 1);
outb(reg, port);
outb(value, port + 1);
}
static uint8_t pnp_read_index(unsigned long port_base, uint8_t reg)
static u8 pnp_read_index(u16 port, u8 reg)
{
outb(reg, port_base);
return inb(port_base + 1);
outb(reg, port);
return inb(port + 1);
}
static void enable_hwm_smbus(device_t dev)
{
/* Set the pin 91,92 as I2C bus. */
uint8_t reg, value;
reg = 0x2a;
value = pnp_read_config(dev, reg);
value |= (1 << 1);
pnp_write_config(dev, reg, value);
u8 reg8;
/* Configure pins 91/92 as SDA/SCL (I2C bus). */
reg8 = pnp_read_config(dev, 0x2a);
reg8 |= (1 << 1);
pnp_write_config(dev, 0x2a, reg8);
}
static void init_acpi(device_t dev)
{
uint8_t value = 0x20;
u8 value = 0x20; /* TODO: 0x20 value here never used? */
int power_on = 1;
get_option(&power_on, "power_on_after_fail");
pnp_enter_ext_func_mode(dev);
pnp_write_index(dev->path.pnp.port, 7, 0x0a);
pnp_set_logical_device(dev);
value = pnp_read_config(dev, 0xe4);
value &= ~(3 << 5);
if (power_on) {
if (power_on)
value |= (1 << 5);
}
pnp_write_config(dev, 0xe4, value);
pnp_exit_ext_func_mode(dev);
}
static void init_hwm(unsigned long base)
static void init_hwm(u16 base)
{
int i;
uint8_t reg, value;
u8 reg, value;
/* reg mask data */
unsigned hwm_reg_values[] = {
u8 hwm_reg_values[] = {
0x40, 0xff, 0x81, /* Start HWM. */
0x48, 0x7f, 0x2a, /* Set SMBus base to 0x54 >> 1. */
0x48, 0x7f, 0x2a, /* Set SMBus base to 0x2a (0x54 >> 1). */
};
for (i = 0; i < ARRAY_SIZE(hwm_reg_values); i += 3) {
@ -100,19 +99,20 @@ static void init_hwm(unsigned long base)
value = pnp_read_index(base, reg);
value &= 0xff & (~(hwm_reg_values[i + 1]));
value |= 0xff & hwm_reg_values[i + 2];
/* printk(BIOS_DEBUG, "base = 0x%04x, reg = 0x%02x, value = 0x%02x\n", base, reg,value); */
printk(BIOS_DEBUG, "base = 0x%04x, reg = 0x%02x, "
"value = 0x%02x\n", base, reg, value);
pnp_write_index(base, reg, value);
}
}
static void w83627ehg_init(device_t dev)
{
struct superio_winbond_w83627ehg_config *conf;
struct superio_winbond_w83627ehg_config *conf = dev->chip_info;
struct resource *res0, *res1;
if (!dev->enabled) {
if (!dev->enabled)
return;
}
conf = dev->chip_info;
switch(dev->path.pnp.device) {
case W83627EHG_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
@ -152,7 +152,7 @@ static void w83627ehg_pnp_enable_resources(device_t dev)
switch (dev->path.pnp.device) {
case W83627EHG_HWM:
printk(BIOS_DEBUG, "w83627ehg hwm smbus enabled\n");
printk(BIOS_DEBUG, "W83627EHG HWM SMBus enabled\n");
enable_hwm_smbus(dev);
break;
}
@ -162,13 +162,14 @@ static void w83627ehg_pnp_enable_resources(device_t dev)
static void w83627ehg_pnp_enable(device_t dev)
{
if (!dev->enabled) {
if (dev->enabled)
return;
pnp_enter_ext_func_mode(dev);
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
pnp_exit_ext_func_mode(dev);
}
}
static struct device_operations ops = {
.read_resources = pnp_read_resources,
@ -183,7 +184,6 @@ static struct pnp_info pnp_dev_info[] = {
{ &ops, W83627EHG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
{ &ops, W83627EHG_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83627EHG_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
/* No 4 { 0,}, */
{ &ops, W83627EHG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
{ &ops, W83627EHG_SFI, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83627EHG_WDTO_PLED, },
@ -201,8 +201,7 @@ static struct pnp_info pnp_dev_info[] = {
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &ops,
ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_winbond_w83627ehg_ops = {

21
src/superio/winbond/w83627ehg/w83627ehg.h
View File

@ -23,35 +23,36 @@
#define SUPERIO_WINBOND_W83627EHG_W83627EHG_H
#define W83627EHG_FDC 0 /* Floppy */
#define W83627EHG_PP 1 /* Parallel Port */
#define W83627EHG_PP 1 /* Parallel port */
#define W83627EHG_SP1 2 /* Com1 */
#define W83627EHG_SP2 3 /* Com2 */
#define W83627EHG_KBC 5 /* Keyboard & Mouse */
#define W83627EHG_GPIO_GAME_MIDI 7 /* GPIO1, GPIO6, Game Port and MIDI Port */
#define W83627EHG_KBC 5 /* PS/2 keyboard & mouse */
#define W83627EHG_GPIO_GAME_MIDI 7 /* GPIO1, GPIO6, Game port, MIDI port */
#define W83627EHG_WDTO_PLED 8 /* TODO */
#define W83627EHG_GPIO_SUSLED 9 /* GPIO2, GPIO3, GPIO4, GPIO5 and SUSLED */
#define W83627EHG_GPIO_SUSLED 9 /* GPIO2, GPIO3, GPIO4, GPIO5, SUSLED */
#define W83627EHG_ACPI 10 /* ACPI */
#define W83627EHG_HWM 11 /* Hardware Monitor */
#define W83627EHG_HWM 11 /* Hardware monitor */
/* virtual devices sharing the enables are encoded as follows:
/*
* Virtual devices sharing the enables are encoded as follows:
* VLDN = baseLDN[7:0] | [10:8] bitpos of enable in 0x30 of baseLDN
*/
#define W83627EHG_SFI ((1 << 8) | 6) /* Flash has bit1 as enable */
#define W83627EHG_GPIO1 W83627EHG_GPIO_GAME_MIDI /* GPIO1 is at LDN 7, bit 0 */
#define W83627EHG_GPIO1 W83627EHG_GPIO_GAME_MIDI /* GPIO1: LDN 7, bit 0 */
#define W83627EHG_GAME ((1 << 8) | 7)
#define W83627EHG_MIDI ((2 << 8) | 7)
#define W83627EHG_GPIO6 ((3 << 8) | 7)
#define W83627EHG_GPIO2 W83627EHG_GPIO_SUSLED /* GPIO2 is at LDN 9, bit 0 */
#define W83627EHG_GPIO2 W83627EHG_GPIO_SUSLED /* GPIO2: LDN 9, bit 0 */
#define W83627EHG_GPIO3 ((1 << 8) | 9)
#define W83627EHG_GPIO4 ((2 << 8) | 9)
#define W83627EHG_GPIO5 ((3 << 8) | 9)
#if defined(__PRE_RAM__) && !defined(__ROMCC__)
void w83627ehg_enable_dev(device_t dev, unsigned iobase);
void w83627ehg_enable_dev(device_t dev, u16 iobase);
void w83627ehg_disable_dev(device_t dev);
void w83627ehg_enable_serial(device_t dev, unsigned iobase);
void w83627ehg_enable_serial(device_t dev, u16 iobase);
#endif
#endif

3
src/superio/winbond/w83627ehg/w83627ehg_early_init.c
View File

@ -19,6 +19,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <stdint.h>
#include <arch/romcc_io.h>
#include "w83627ehg.h"
@ -28,7 +29,7 @@ void w83627ehg_disable_dev(device_t dev)
pnp_set_enable(dev, 0);
}
void w83627ehg_enable_dev(device_t dev, unsigned iobase)
void w83627ehg_enable_dev(device_t dev, u16 iobase)
{
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);

8
src/superio/winbond/w83627ehg/w83627ehg_early_serial.c
View File

@ -22,20 +22,20 @@
#include <arch/romcc_io.h>
#include "w83627ehg.h"
static inline void pnp_enter_ext_func_mode(device_t dev)
static void pnp_enter_ext_func_mode(device_t dev)
{
unsigned port = dev >> 8;
u16 port = dev >> 8;
outb(0x87, port);
outb(0x87, port);
}
static void pnp_exit_ext_func_mode(device_t dev)
{
unsigned port = dev >> 8;
u16 port = dev >> 8;
outb(0xaa, port);
}
void w83627ehg_enable_serial(device_t dev, unsigned iobase)
void w83627ehg_enable_serial(device_t dev, u16 iobase)
{
pnp_enter_ext_func_mode(dev);
pnp_set_logical_device(dev);

2
src/superio/winbond/w83627hf/Makefile.inc
View File

@ -20,5 +20,5 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
#config chip.h
ramstage-$(CONFIG_SUPERIO_WINBOND_W83627HF) += superio.c

2
src/superio/winbond/w83627hf/chip.h
View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
* Copyright (C) 2004 Tyan By LYH change from PC87360
* Copyright (C) 2004 Tyan
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by

85
src/superio/winbond/w83627hf/superio.c
View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
* Copyright (C) 2004 Tyan By LYH change from PC87360
* Copyright (C) 2004 Tyan
* Copyright (C) 2010 Win Enterprises (anishp@win-ent.com)
*
* This program is free software; you can redistribute it and/or modify
@ -45,73 +45,74 @@ static void pnp_exit_ext_func_mode(device_t dev)
outb(0xaa, dev->path.pnp.port);
}
static void pnp_write_index(unsigned long port_base, uint8_t reg, uint8_t value)
static void pnp_write_index(u16 port, u8 reg, u8 value)
{
outb(reg, port_base);
outb(value, port_base + 1);
outb(reg, port);
outb(value, port + 1);
}
static uint8_t pnp_read_index(unsigned long port_base, uint8_t reg)
static u8 pnp_read_index(u16 port, u8 reg)
{
outb(reg, port_base);
return inb(port_base + 1);
outb(reg, port);
return inb(port + 1);
}
#if CONFIG_EXPERT
static void w83627hf_16_bit_addr_qual(device_t dev)
{
int port = dev->path.pnp.port >> 8;
u8 reg8;
/* Enable 16 bit address qualification. */
pnp_enter_ext_func_mode(dev);
outb(0x24, port);
/* enable 16 bit address qualification */
outb(inb(port + 1) | 0x80, port + 1);
reg8 = pnp_read_config(dev, 0x24);
reg8 |= (1 << 7);
pnp_write_config(dev, 0x24, reg8);
pnp_exit_ext_func_mode(dev);
}
#endif
static void enable_hwm_smbus(device_t dev)
{
/* set the pin 91,92 as I2C bus */
uint8_t reg, value;
reg = 0x2b;
value = pnp_read_config(dev, reg);
value &= 0x3f;
pnp_write_config(dev, reg, value);
u8 reg8;
/* Configure pins 91/92 as SDA/SCL (I2C bus). */
reg8 = pnp_read_config(dev, 0x2b);
reg8 &= 0x3f;
pnp_write_config(dev, 0x2b, reg8);
}
static void init_acpi(device_t dev)
{
uint8_t value = 0x20;
u8 value = 0x20; /* FIXME: The 0x20 value here is never used? */
int power_on = 1;
get_option(&power_on, "power_on_after_fail");
pnp_enter_ext_func_mode(dev);
pnp_write_index(dev->path.pnp.port,7,0x0a);
pnp_set_logical_device(dev);
value = pnp_read_config(dev, 0xE4);
value &= ~(3 << 5);
if(power_on) {
if (power_on)
value |= (1 << 5);
}
pnp_write_config(dev, 0xE4, value);
pnp_exit_ext_func_mode(dev);
}
static void init_hwm(unsigned long base)
static void init_hwm(u16 base)
{
uint8_t reg, value;
u8 reg, value;
int i;
unsigned hwm_reg_values[] = {
u8 hwm_reg_values[] = {
/* reg mask data */
0x40, 0xff, 0x81, /* start HWM */
0x48, 0xaa, 0x2a, /* set SMBus base to 0x54>>1 */
0x4a, 0x21, 0x21, /* set T2 SMBus base to 0x92>>1 and T3 SMBus base to 0x94>>1 */
0x40, 0xff, 0x81, /* Start HWM. */
0x48, 0xaa, 0x2a, /* Set SMBus base to 0x2a (0x54 >> 1). */
0x4a, 0x21, 0x21, /* Set T2 SMBus base to 0x92>>1 and T3 SMBus base to 0x94>>1. */
0x4e, 0x80, 0x00,
0x43, 0x00, 0xff,
0x44, 0x00, 0x3f,
0x4c, 0xbf, 0x18,
0x4d, 0xff, 0x80 /* turn off beep */
0x4d, 0xff, 0x80, /* Turn off beep */
};
for (i = 0; i < ARRAY_SIZE(hwm_reg_values); i += 3) {
@ -119,21 +120,20 @@ static void init_hwm(unsigned long base)
value = pnp_read_index(base, reg);
value &= 0xff & hwm_reg_values[i + 1];
value |= 0xff & hwm_reg_values[i + 2];
#if 0
printk(BIOS_DEBUG, "base = 0x%04x, reg = 0x%02x, value = 0x%02x\n", base, reg,value);
#endif
printk(BIOS_DEBUG, "base = 0x%04x, reg = 0x%02x, "
"value = 0x%02x\n", base, reg, value);
pnp_write_index(base, reg, value);
}
}
static void w83627hf_init(device_t dev)
{
struct superio_winbond_w83627hf_config *conf;
struct superio_winbond_w83627hf_config *conf = dev->chip_info;
struct resource *res0, *res1;
if (!dev->enabled) {
if (!dev->enabled)
return;
}
conf = dev->chip_info;
switch(dev->path.pnp.device) {
case W83627HF_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
@ -172,7 +172,7 @@ static void w83627hf_pnp_enable_resources(device_t dev)
pnp_enable_resources(dev);
switch(dev->path.pnp.device) {
case W83627HF_HWM:
printk(BIOS_DEBUG, "w83627hf hwm smbus enabled\n");
printk(BIOS_DEBUG, "W83627HF HWM SMBus enabled\n");
enable_hwm_smbus(dev);
break;
}
@ -181,15 +181,14 @@ static void w83627hf_pnp_enable_resources(device_t dev)
static void w83627hf_pnp_enable(device_t dev)
{
if (!dev->enabled) {
pnp_enter_ext_func_mode(dev);
if (dev->enabled)
return;
pnp_enter_ext_func_mode(dev);
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
pnp_exit_ext_func_mode(dev);
}
}
static struct device_operations ops = {
.read_resources = pnp_read_resources,
@ -204,7 +203,6 @@ static struct pnp_info pnp_dev_info[] = {
{ &ops, W83627HF_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
{ &ops, W83627HF_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83627HF_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
/* No 4 { 0,}, */
{ &ops, W83627HF_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
{ &ops, W83627HF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83627HF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 0x4}, },
@ -216,8 +214,7 @@ static struct pnp_info pnp_dev_info[] = {
static void enable_dev(struct device *dev)
{
pnp_enable_devices(dev, &ops,
ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_winbond_w83627hf_ops = {

12
src/superio/winbond/w83627hf/w83627hf.h
View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
* Copyright (C) 2004 Tyan By LYH change from PC87360
* Copyright (C) 2004 Tyan
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -24,16 +24,16 @@
#define SUPERIO_WINBOND_W83627HF_W83627HF_H
#define W83627HF_FDC 0 /* Floppy */
#define W83627HF_PP 1 /* Parallel Port */
#define W83627HF_PP 1 /* Parallel port */
#define W83627HF_SP1 2 /* Com1 */
#define W83627HF_SP2 3 /* Com2 */
#define W83627HF_KBC 5 /* Keyboard & Mouse */
#define W83627HF_KBC 5 /* PS/2 keyboard & mouse */
#define W83627HF_CIR 6
#define W83627HF_GAME_MIDI_GPIO1 7
#define W83627HF_GPIO2 8
#define W83627HF_GPIO3 9
#define W83627HF_ACPI 10
#define W83627HF_HWM 11 /* Hardware Monitor */
#define W83627HF_HWM 11 /* Hardware monitor */
/* #define W83627HF_GPIO_DEV PNP_DEV(0x2e, W83627HF_GPIO) */
/* #define W83627HF_XBUS_DEV PNP_DEV(0x2e, W83627HF_XBUS) */
@ -115,8 +115,8 @@
#if defined(__PRE_RAM__) && !defined(__ROMCC__)
void w83627hf_disable_dev(device_t dev);
void w83627hf_enable_dev(device_t dev, unsigned iobase);
void w83627hf_enable_serial(device_t dev, unsigned iobase);
void w83627hf_enable_dev(device_t dev, u16 iobase);
void w83627hf_enable_serial(device_t dev, u16 iobase);
void w83627hf_set_clksel_48(device_t dev);
#endif

4
src/superio/winbond/w83627hf/w83627hf_early_init.c
View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright 2003-2004 Linux Networx
* Copyright 2004 Tyan By LYH change from PC87360
* Copyright 2004 Tyan
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -29,7 +29,7 @@ void w83627hf_disable_dev(device_t dev)
pnp_set_enable(dev, 0);
}
void w83627hf_enable_dev(device_t dev, unsigned iobase)
void w83627hf_enable_dev(device_t dev, u16 iobase)
{
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);

19
src/superio/winbond/w83627hf/w83627hf_early_serial.c
View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
* Copyright (C) 2004 Tyan By LYH change from PC87360
* Copyright (C) 2004 Tyan
* Copyright (C) 2010 Win Enterprises (anishp@win-ent.com)
*
* This program is free software; you can redistribute it and/or modify
@ -24,20 +24,20 @@
#include <arch/romcc_io.h>
#include "w83627hf.h"
static inline void pnp_enter_ext_func_mode(device_t dev)
static void pnp_enter_ext_func_mode(device_t dev)
{
unsigned port = dev>>8;
u16 port = dev >> 8;
outb(0x87, port);
outb(0x87, port);
}
static void pnp_exit_ext_func_mode(device_t dev)
{
unsigned port = dev>>8;
u16 port = dev >> 8;
outb(0xaa, port);
}
void w83627hf_enable_serial(device_t dev, unsigned iobase)
void w83627hf_enable_serial(device_t dev, u16 iobase)
{
pnp_enter_ext_func_mode(dev);
pnp_set_logical_device(dev);
@ -49,10 +49,11 @@ void w83627hf_enable_serial(device_t dev, unsigned iobase)
void w83627hf_set_clksel_48(device_t dev)
{
unsigned port = dev >> 8;
u8 reg8;
pnp_enter_ext_func_mode(dev);
outb(0x24, port);
/* Set CLKSEL (clock input on pin 1) to 48MHz. */
outb(inb(port + 1) | (1 << 6), port + 1);
reg8 = pnp_read_config(dev, 0x24);
reg8 |= (1 << 6); /* Set CLKSEL (clock input on pin 1) to 48MHz. */
pnp_write_config(dev, 0x24, reg8);
pnp_exit_ext_func_mode(dev);
}

2
src/superio/winbond/w83627thf/Makefile.inc
View File

@ -20,5 +20,5 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
#config chip.h
ramstage-$(CONFIG_SUPERIO_WINBOND_W83627THF) += superio.c

2
src/superio/winbond/w83627thf/chip.h
View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
* Copyright (C) 2004 Tyan By LYH change from PC87360
* Copyright (C) 2004 Tyan
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by

17
src/superio/winbond/w83627thf/superio.c
View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
* Copyright (C) 2004 Tyan By LYH change from PC87360
* Copyright (C) 2004 Tyan
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -45,15 +45,12 @@ static void w83627thf_exit_ext_func_mode(device_t dev)
static void w83627thf_init(device_t dev)
{
struct superio_winbond_w83627thf_config *conf;
struct superio_winbond_w83627thf_config *conf = dev->chip_info;
struct resource *res0, *res1;
/* Wishlist handle well known programming interfaces more
* generically.
*/
if (!dev->enabled) {
if (!dev->enabled)
return;
}
conf = dev->chip_info;
switch(dev->path.pnp.device) {
case W83627THF_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
@ -105,7 +102,6 @@ static struct pnp_info pnp_dev_info[] = {
{ &ops, W83627THF_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
{ &ops, W83627THF_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83627THF_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
/* No 4 { 0,}, */
{ &ops, W83627THF_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
{ &ops, W83627THF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83627THF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 4} },
@ -117,8 +113,7 @@ static struct pnp_info pnp_dev_info[] = {
static void enable_dev(device_t dev)
{
pnp_enable_devices(dev, &ops,
ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_winbond_w83627thf_ops = {

8
src/superio/winbond/w83627thf/w83627thf.h
View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
* Copyright (C) 2004 Tyan By LYH change from PC87360
* Copyright (C) 2004 Tyan
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -24,15 +24,15 @@
#define SUPERIO_WINBOND_W83627THF_W83627THF_H
#define W83627THF_FDC 0 /* Floppy */
#define W83627THF_PP 1 /* Parallel Port */
#define W83627THF_PP 1 /* Parallel port */
#define W83627THF_SP1 2 /* Com1 */
#define W83627THF_SP2 3 /* Com2 */
#define W83627THF_KBC 5 /* Keyboard & Mouse */
#define W83627THF_KBC 5 /* PS/2 keyboard & mouse */
#define W83627THF_CIR 6
#define W83627THF_GAME_MIDI_GPIO1 7
#define W83627THF_GPIO2 8
#define W83627THF_GPIO3 9
#define W83627THF_ACPI 10
#define W83627THF_HWM 11 /* Hardware Monitor */
#define W83627THF_HWM 11 /* Hardware monitor */
#endif

10
src/superio/winbond/w83627thf/w83627thf_early_serial.c
View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
* Copyright (C) 2004 Tyan By LYH change from PC87360
* Copyright (C) 2004 Tyan
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -23,20 +23,20 @@
#include <arch/romcc_io.h>
#include "w83627thf.h"
static inline void pnp_enter_ext_func_mode(device_t dev)
static void pnp_enter_ext_func_mode(device_t dev)
{
unsigned int port = dev >> 8;
u16 port = dev >> 8;
outb(0x87, port);
outb(0x87, port);
}
static void pnp_exit_ext_func_mode(device_t dev)
{
unsigned int port = dev >> 8;
u16 port = dev >> 8;
outb(0xaa, port);
}
static void w83627thf_enable_serial(device_t dev, unsigned int iobase)
static void w83627thf_enable_serial(device_t dev, u16 iobase)
{
pnp_enter_ext_func_mode(dev);
pnp_set_logical_device(dev);

2
src/superio/winbond/w83627thg/Makefile.inc
View File

@ -20,5 +20,5 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
#config chip.h
ramstage-$(CONFIG_SUPERIO_WINBOND_W83627THG) += superio.c

2
src/superio/winbond/w83627thg/chip.h
View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
* Copyright (C) 2004 Tyan By LYH change from PC87360
* Copyright (C) 2004 Tyan
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by

18
src/superio/winbond/w83627thg/superio.c
View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
* Copyright (C) 2004 Tyan By LYH change from PC87360
* Copyright (C) 2004 Tyan
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -36,6 +36,7 @@ static void w83627thg_enter_ext_func_mode(device_t dev)
outb(0x87, dev->path.pnp.port);
outb(0x87, dev->path.pnp.port);
}
static void w83627thg_exit_ext_func_mode(device_t dev)
{
outb(0xaa, dev->path.pnp.port);
@ -43,15 +44,12 @@ static void w83627thg_exit_ext_func_mode(device_t dev)
static void w83627thg_init(device_t dev)
{
struct superio_winbond_w83627thg_config *conf;
struct superio_winbond_w83627thg_config *conf = dev->chip_info;
struct resource *res0, *res1;
/* Wishlist handle well known programming interfaces more
* generically.
*/
if (!dev->enabled) {
if (!dev->enabled)
return;
}
conf = dev->chip_info;
switch(dev->path.pnp.device) {
case W83627THG_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
@ -103,7 +101,6 @@ static struct pnp_info pnp_dev_info[] = {
{ &ops, W83627THG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
{ &ops, W83627THG_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83627THG_SP2, PNP_IO0 | PNP_IRQ0 | PNP_MSC1, { 0x7f8, 0 }, },
/* No 4 { 0,}, */
{ &ops, W83627THG_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1 | PNP_MSC0, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
{ &ops, W83627THG_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 4} },
{ &ops, W83627THG_GPIO2,},
@ -114,8 +111,7 @@ static struct pnp_info pnp_dev_info[] = {
static void enable_dev(device_t dev)
{
pnp_enable_devices(dev, &ops,
sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_winbond_w83627thg_ops = {

8
src/superio/winbond/w83627thg/w83627thg.h
View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
* Copyright (C) 2004 Tyan By LYH change from PC87360
* Copyright (C) 2004 Tyan
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -24,14 +24,14 @@
#define SUPERIO_WINBOND_W83627THG_W83627THG_H
#define W83627THG_FDC 0 /* Floppy */
#define W83627THG_PP 1 /* Parallel Port */
#define W83627THG_PP 1 /* Parallel port */
#define W83627THG_SP1 2 /* Com1 */
#define W83627THG_SP2 3 /* Com2 */
#define W83627THG_KBC 5 /* Keyboard & Mouse */
#define W83627THG_KBC 5 /* PS/2 keyboard & mouse */
#define W83627THG_GAME_MIDI_GPIO1 7
#define W83627THG_GPIO2 8
#define W83627THG_GPIO3 9
#define W83627THG_ACPI 10
#define W83627THG_HWM 11 /* Hardware Monitor */
#define W83627THG_HWM 11 /* Hardware monitor */
#endif

10
src/superio/winbond/w83627thg/w83627thg_early_serial.c
View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
* Copyright (C) 2004 Tyan By LYH change from PC87360
* Copyright (C) 2004 Tyan
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -23,20 +23,20 @@
#include <arch/romcc_io.h>
#include "w83627thg.h"
static inline void pnp_enter_ext_func_mode(device_t dev)
static void pnp_enter_ext_func_mode(device_t dev)
{
unsigned int port = dev >> 8;
u16 port = dev >> 8;
outb(0x87, port);
outb(0x87, port);
}
static void pnp_exit_ext_func_mode(device_t dev)
{
unsigned int port = dev >> 8;
u16 port = dev >> 8;
outb(0xaa, port);
}
static inline void w83627thg_enable_serial(device_t dev, unsigned int iobase)
static void inline w83627thg_enable_serial(device_t dev, u16 iobase)
{
pnp_enter_ext_func_mode(dev);
pnp_set_logical_device(dev);

2
src/superio/winbond/w83627uhg/Makefile.inc
View File

@ -18,5 +18,5 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 $
##
#config chip.h
ramstage-$(CONFIG_SUPERIO_WINBOND_W83627UHG) += superio.c

3
src/superio/winbond/w83627uhg/superio.c
View File

@ -72,13 +72,12 @@ static void set_uart_clock_source(device_t dev, u8 uart_clock)
static void w83627uhg_init(device_t dev)
{
struct superio_winbond_w83627uhg_config *conf;
struct superio_winbond_w83627uhg_config *conf = dev->chip_info;
struct resource *res0, *res1;
if (!dev->enabled)
return;
conf = dev->chip_info;
switch(dev->path.pnp.device) {
case W83627UHG_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);

2
src/superio/winbond/w83627uhg/w83627uhg_early_serial.c
View File

@ -47,7 +47,7 @@ static void w83627uhg_set_input_clk_sel(device_t dev, u8 speed_24mhz)
pnp_write_config(dev, 0x24, value);
}
static void w83627uhg_enable_serial(device_t dev, u32 iobase)
static void w83627uhg_enable_serial(device_t dev, u16 iobase)
{
pnp_enter_ext_func_mode(dev);
pnp_set_logical_device(dev);

2
src/superio/winbond/w83697hf/Makefile.inc
View File

@ -18,5 +18,5 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
#config chip.h
ramstage-$(CONFIG_SUPERIO_WINBOND_W83697HF) += superio.c

8
src/superio/winbond/w83697hf/superio.c
View File

@ -43,13 +43,12 @@ static void pnp_exit_ext_func_mode(device_t dev)
static void w83697hf_init(device_t dev)
{
struct superio_winbond_w83697hf_config *conf;
struct superio_winbond_w83697hf_config *conf = dev->chip_info;
struct resource *res0;
if (!dev->enabled)
return;
conf = dev->chip_info;
switch(dev->path.pnp.device) {
case W83697HF_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
@ -71,13 +70,14 @@ static void w83697hf_pnp_set_resources(device_t dev)
static void w83697hf_pnp_enable(device_t dev)
{
if (!dev->enabled) {
if (dev->enabled)
return;
pnp_enter_ext_func_mode(dev);
pnp_set_logical_device(dev);
pnp_set_enable(dev, 0);
pnp_exit_ext_func_mode(dev);
}
}
static void w83697hf_pnp_enable_resources(device_t dev)
{

4
src/superio/winbond/w83697hf/w83697hf.h
View File

@ -22,7 +22,7 @@
#define SUPERIO_WINBOND_W83697HF_W83697HF_H
#define W83697HF_FDC 0 /* Floppy */
#define W83697HF_PP 1 /* Parallel Port */
#define W83697HF_PP 1 /* Parallel port */
#define W83697HF_SP1 2 /* Com1 */
#define W83697HF_SP2 3 /* Com2 */
#define W83697HF_CIR 6 /* Consumer IR */
@ -30,6 +30,6 @@
#define W83697HF_MIDI_GPIO5 8 /* MIDI, GPIO 5 */
#define W83697HF_GPIO234 9 /* GPIO 2, 3, 4 */
#define W83697HF_ACPI 10 /* ACPI */
#define W83697HF_HWM 11 /* Hardware Monitor */
#define W83697HF_HWM 11 /* Hardware monitor */
#endif

11
src/superio/winbond/w83697hf/w83697hf_early_serial.c
View File

@ -22,7 +22,7 @@
#include <arch/romcc_io.h>
#include "w83697hf.h"
static inline void pnp_enter_ext_func_mode(device_t dev)
static void pnp_enter_ext_func_mode(device_t dev)
{
u16 port = dev >> 8;
outb(0x87, port);
@ -37,11 +37,12 @@ static void pnp_exit_ext_func_mode(device_t dev)
static void w83697hf_set_clksel_48(device_t dev)
{
u16 port = dev >> 8;
u8 reg8;
pnp_enter_ext_func_mode(dev);
outb(0x24, port);
/* Set the clock input to 48Mhz */
outb(inb(port+1)|0x40, port+1);
reg8 = pnp_read_config(dev, 0x24);
reg8 |= (1 << 6); /* Set the clock input to 48MHz. */
pnp_write_config(dev, 0x24, reg8);
pnp_exit_ext_func_mode(dev);
}

2
src/superio/winbond/w83977f/Makefile.inc
View File

@ -18,5 +18,5 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
#config chip.h
ramstage-$(CONFIG_SUPERIO_WINBOND_W83977F) += superio.c

13
src/superio/winbond/w83977f/superio.c
View File

@ -35,6 +35,7 @@ static void w83977f_enter_ext_func_mode(device_t dev)
outb(0x87, dev->path.pnp.port);
outb(0x87, dev->path.pnp.port);
}
static void w83977f_exit_ext_func_mode(device_t dev)
{
outb(0xaa, dev->path.pnp.port);
@ -42,13 +43,12 @@ static void w83977f_exit_ext_func_mode(device_t dev)
static void w83977f_init(device_t dev)
{
struct superio_winbond_w83977f_config *conf;
struct superio_winbond_w83977f_config *conf = dev->chip_info;
struct resource *res0, *res1;
if (!dev->enabled) {
if (!dev->enabled)
return;
}
conf = dev->chip_info;
switch(dev->path.pnp.device) {
case W83977F_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
@ -109,11 +109,10 @@ static struct pnp_info pnp_dev_info[] = {
static void enable_dev(device_t dev)
{
pnp_enable_devices(dev, &ops,
ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_winbond_w83977f_ops = {
CHIP_NAME("Winbond W83977F-A Super I/O")
CHIP_NAME("Winbond W83977F Super I/O")
.enable_dev = enable_dev,
};

6
src/superio/winbond/w83977f/w83977f.h
View File

@ -22,12 +22,12 @@
#define SUPERIO_WINBOND_W83977F_W83977F_H
#define W83977F_FDC 0 /* Floppy */
#define W83977F_PP 1 /* Parallel Port */
#define W83977F_PP 1 /* Parallel port */
#define W83977F_SP1 2 /* Com1 */
#define W83977F_SP2 3 /* Com2 */
#define W83977F_RTC 4 /* RTC */
#define W83977F_KBC 5 /* Keyboard & Mouse */
#define W83977F_IR 6 /* Infrared Port */
#define W83977F_KBC 5 /* PS/2 keyboard & mouse */
#define W83977F_IR 6 /* Infrared port */
#define W83977F_GPIO1 7 /* General Purpose I/O 1 */
#define W83977F_GPIO2 8 /* General Purpose I/O 2 */

8
src/superio/winbond/w83977f/w83977f_early_serial.c
View File

@ -21,20 +21,20 @@
#include <arch/romcc_io.h>
#include "w83977f.h"
static inline void pnp_enter_ext_func_mode(device_t dev)
static void pnp_enter_ext_func_mode(device_t dev)
{
unsigned int port = dev >> 8;
u16 port = dev >> 8;
outb(0x87, port);
outb(0x87, port);
}
static void pnp_exit_ext_func_mode(device_t dev)
{
unsigned int port = dev >> 8;
u16 port = dev >> 8;
outb(0xaa, port);
}
static void w83977f_enable_serial(device_t dev, unsigned int iobase)
static void w83977f_enable_serial(device_t dev, u16 iobase)
{
pnp_enter_ext_func_mode(dev);
pnp_set_logical_device(dev);

2
src/superio/winbond/w83977tf/Makefile.inc
View File

@ -20,5 +20,5 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
#config chip.h
ramstage-$(CONFIG_SUPERIO_WINBOND_W83977TF) += superio.c

2
src/superio/winbond/w83977tf/chip.h
View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
* Copyright (C) 2004 Tyan By LYH change from PC87360
* Copyright (C) 2004 Tyan
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by

25
src/superio/winbond/w83977tf/superio.c
View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
* Copyright (C) 2004 Tyan By LYH change from PC87360
* Copyright (C) 2004 Tyan
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -20,13 +20,6 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
/* 2006-4-24
* Adapted for the w83977 by rsmith <smithbone@gmail.com>
* This is mostly just a search and replace on the part type
* TODO: Actually see if all the sub functionis exist and are
* setup correctly.
*/
#include <arch/io.h>
#include <device/device.h>
#include <device/pnp.h>
@ -44,6 +37,7 @@ static void w83977tf_enter_ext_func_mode(device_t dev)
outb(0x87, dev->path.pnp.port);
outb(0x87, dev->path.pnp.port);
}
static void w83977tf_exit_ext_func_mode(device_t dev)
{
outb(0xaa, dev->path.pnp.port);
@ -51,15 +45,12 @@ static void w83977tf_exit_ext_func_mode(device_t dev)
static void w83977tf_init(device_t dev)
{
struct superio_winbond_w83977tf_config *conf;
struct superio_winbond_w83977tf_config *conf = dev->chip_info;
struct resource *res0, *res1;
/* Wishlist handle well known programming interfaces more
* generically.
*/
if (!dev->enabled) {
if (!dev->enabled)
return;
}
conf = dev->chip_info;
switch(dev->path.pnp.device) {
case W83977TF_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
@ -111,7 +102,6 @@ static struct pnp_info pnp_dev_info[] = {
{ &ops, W83977TF_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
{ &ops, W83977TF_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83977TF_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
/* No 4 { 0,}, */
{ &ops, W83977TF_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
{ &ops, W83977TF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83977TF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 4} },
@ -120,8 +110,7 @@ static struct pnp_info pnp_dev_info[] = {
static void enable_dev(device_t dev)
{
pnp_enable_devices(dev, &ops,
ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
}
struct chip_operations superio_winbond_w83977tf_ops = {

6
src/superio/winbond/w83977tf/w83977tf.h
View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
* Copyright (C) 2004 Tyan By LYH change from PC87360
* Copyright (C) 2004 Tyan
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -24,10 +24,10 @@
#define SUPERIO_WINBOND_W83977TF_W83977TF_H
#define W83977TF_FDC 0 /* Floppy */
#define W83977TF_PP 1 /* Parallel Port */
#define W83977TF_PP 1 /* Parallel port */
#define W83977TF_SP1 2 /* Com1 */
#define W83977TF_SP2 3 /* Com2 */
#define W83977TF_KBC 5 /* Keyboard & Mouse */
#define W83977TF_KBC 5 /* PS/2 keyboard & mouse */
#define W83977TF_CIR 6
#define W83977TF_GAME_MIDI_GPIO1 7
#define W83977TF_GPIO2 8

10
src/superio/winbond/w83977tf/w83977tf_early_serial.c
View File

@ -3,7 +3,7 @@
*
* Copyright (C) 2000 AG Electronics Ltd.
* Copyright (C) 2003-2004 Linux Networx
* Copyright (C) 2004 Tyan By LYH change from PC87360
* Copyright (C) 2004 Tyan
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@ -23,20 +23,20 @@
#include <arch/romcc_io.h>
#include "w83977tf.h"
static inline void pnp_enter_ext_func_mode(device_t dev)
static void pnp_enter_ext_func_mode(device_t dev)
{
unsigned int port = dev >> 8;
u16 port = dev >> 8;
outb(0x87, port);
outb(0x87, port);
}
static void pnp_exit_ext_func_mode(device_t dev)
{
unsigned int port = dev >> 8;
u16 port = dev >> 8;
outb(0xaa, port);
}
static void w83977tf_enable_serial(device_t dev, unsigned int iobase)
static void w83977tf_enable_serial(device_t dev, u16 iobase)
{
pnp_enter_ext_func_mode(dev);
pnp_set_logical_device(dev);