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Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-39 

Creator:  Li-Ta Lo <ollie@lanl.gov>

TLA sucks again

This is the third time I try to commit only the emulator changes.
I hope this patch contains the emulator changes only.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1955 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
arch import user (historical) 2005-07-06 17:15:57 +00:00
parent 1c8cd59f3c
commit 34120d1b4f
5 changed files with 27 additions and 34 deletions
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4
src/devices/emulator/x86emu/debug.c
View File

@ -225,6 +225,7 @@ void X86EMU_dump_memory (u16 seg, u16 off, u32 amt)
void x86emu_single_step (void)
{
#if 0
char s[1024];
int ps[10];
int ntok;
@ -313,6 +314,7 @@ void x86emu_single_step (void)
break;
}
}
#endif
}
int X86EMU_trace_on(void)
@ -327,6 +329,7 @@ int X86EMU_trace_off(void)
static int parse_line (char *s, int *ps, int *n)
{
#if 0
int cmd;
*n = 0;
@ -352,6 +355,7 @@ static int parse_line (char *s, int *ps, int *n)
sscanf(s,"%x",&ps[*n]);
*n += 1;
}
#endif
}
#endif /* DEBUG */

2
src/devices/emulator/x86emu/decode.c
View File

@ -77,6 +77,8 @@ next instruction.
void x86emu_intr_raise(
u8 intrnum)
{
printk("%s, rasing execption %x\n", __func__, intrnum);
x86emu_dump_regs();
M.x86.intno = intrnum;
M.x86.intr |= INTR_SYNCH;
}

51
src/devices/emulator/x86emu/ops.c
View File

@ -70,7 +70,7 @@
*
****************************************************************************/
#include "x86emui.h"
#include "x86emu/x86emui.h"
/*----------------------------- Implementation ----------------------------*/
@ -219,7 +219,8 @@ void x86emuOp_genop_byte_RM_R(u8 op1)
DECODE_PRINTF("\n");
TRACE_AND_STEP();
destval = genop_byte_operation[op1](destval, *srcreg);
store_data_byte(destoffset, destval);
if (op1 != 7)
store_data_byte(destoffset, destval);
}
else
{ /* register to register */
@ -262,7 +263,8 @@ void x86emuOp_genop_word_RM_R(u8 op1)
DECODE_PRINTF("\n");
TRACE_AND_STEP();
destval = genop_long_operation[op1](destval, *srcreg);
store_data_long(destoffset, destval);
if (op1 != 7)
store_data_long(destoffset, destval);
} else {
u16 destval;
u16 *srcreg;
@ -273,11 +275,12 @@ void x86emuOp_genop_word_RM_R(u8 op1)
DECODE_PRINTF("\n");
TRACE_AND_STEP();
destval = genop_word_operation[op1](destval, *srcreg);
store_data_word(destoffset, destval);
if (op1 != 7)
store_data_word(destoffset, destval);
}
} else { /* register to register */
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg,*srcreg;
u32 *destreg, *srcreg;
destreg = DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
@ -286,7 +289,7 @@ void x86emuOp_genop_word_RM_R(u8 op1)
TRACE_AND_STEP();
*destreg = genop_long_operation[op1](*destreg, *srcreg);
} else {
u16 *destreg,*srcreg;
u16 *destreg, *srcreg;
destreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
@ -1332,9 +1335,7 @@ void x86emuOp_opc80_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
imm = fetch_byte_imm();
DECODE_PRINTF2("%x\n", imm);
TRACE_AND_STEP();
destval = (*genop_byte_operation[rh]) (*destreg, imm);
if (rh != 7)
*destreg = destval;
*destreg = (*genop_byte_operation[rh]) (*destreg, imm);
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
@ -1423,29 +1424,23 @@ void x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1))
}
} else { /* register to register */
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg;
u32 destval,imm;
u32 *destreg, imm;
destreg = DECODE_RM_LONG_REGISTER(rl);
DECODE_PRINTF(",");
imm = fetch_long_imm();
DECODE_PRINTF2("%x\n", imm);
TRACE_AND_STEP();
destval = (*genop_long_operation[rh]) (*destreg, imm);
if (rh != 7)
*destreg = destval;
*destreg = (*genop_long_operation[rh]) (*destreg, imm);
} else {
u16 *destreg;
u16 destval,imm;
u16 *destreg, imm;
destreg = DECODE_RM_WORD_REGISTER(rl);
DECODE_PRINTF(",");
imm = fetch_word_imm();
DECODE_PRINTF2("%x\n", imm);
TRACE_AND_STEP();
destval = (*genop_word_operation[rh]) (*destreg, imm);
if (rh != 7)
*destreg = destval;
*destreg = (*genop_word_operation[rh]) (*destreg, imm);
}
}
DECODE_CLEAR_SEGOVR();
@ -1523,9 +1518,7 @@ void x86emuOp_opc82_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
imm = fetch_byte_imm();
DECODE_PRINTF2(",%x\n", imm);
TRACE_AND_STEP();
destval = (*genop_byte_operation[rh]) (*destreg, imm);
if (rh != 7)
*destreg = destval;
*destreg = (*genop_byte_operation[rh]) (*destreg, imm);
}
DECODE_CLEAR_SEGOVR();
END_OF_INSTR();
@ -1611,27 +1604,21 @@ void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))
}
} else { /* register to register */
if (M.x86.mode & SYSMODE_PREFIX_DATA) {
u32 *destreg;
u32 destval,imm;
u32 *destreg, imm;
destreg = DECODE_RM_LONG_REGISTER(rl);
imm = (s8) fetch_byte_imm();
DECODE_PRINTF2(",%x\n", imm);
TRACE_AND_STEP();
destval = (*genop_long_operation[rh]) (*destreg, imm);
if (rh != 7)
*destreg = destval;
*destreg = (*genop_long_operation[rh]) (*destreg, imm);
} else {
u16 *destreg;
u16 destval,imm;
u16 *destreg, imm;
destreg = DECODE_RM_WORD_REGISTER(rl);
imm = (s8) fetch_byte_imm();
DECODE_PRINTF2(",%x\n", imm);
TRACE_AND_STEP();
destval = (*genop_word_operation[rh]) (*destreg, imm);
if (rh != 7)
*destreg = destval;
*destreg = (*genop_word_operation[rh]) (*destreg, imm);
}
}
DECODE_CLEAR_SEGOVR();

2
src/devices/emulator/x86emu/ops2.c
View File

@ -61,7 +61,7 @@ void x86emuOp2_illegal_op(
END_OF_INSTR();
}
#define xorl(a,b) ((a) && !(b)) || (!(a) && (b))
#define xorl(a,b) (((a) && !(b)) || (!(a) && (b)))
/****************************************************************************
REMARKS:

2
src/devices/emulator/x86emu/prim_ops.c
View File

@ -1921,7 +1921,7 @@ Implements the IMUL instruction and side effects.
void imul_long_direct(u32 *res_lo, u32* res_hi,u32 d, u32 s)
{
#ifdef __HAS_LONG_LONG__
s64 res = (s32)d * (s32)s;
s64 res = (s64)d * (s64)s;
*res_lo = (u32)res;
*res_hi = (u32)(res >> 32);