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mb/google/dedede/variant/drawcia: Include SPD for MT53E512M32D1NP-046 WT:B 

Add SPD support to drawcia for MT53E512M32D1NP-046 WT:B.
This part is already in global_lp4x_mem_parts.json.txt, and use
/util/spd_tool/lp4x/gen_part_id to assigns DRAM IDs.

BUG=b:196951879
BRANCH=firmware-dedede-13606.B
TEST=FW_NAME=drawcia emerge-dedede coreboot chromeos-bootimage

Change-Id: Ic42e6357943ba651ffd92fb2974e9ea52fa19020
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56905
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Wisley Chen 2021-08-11 10:55:08 +06:00 committed by Felix Held
parent d59c950379
commit 3412d28b45
3 changed files with 3 additions and 1 deletions
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2
src/mainboard/google/dedede/variants/drawcia/memory/Makefile.inc
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@ -2,4 +2,4 @@
## This is an auto-generated file. Do not edit!! ## This is an auto-generated file. Do not edit!!
SPD_SOURCES = SPD_SOURCES =
SPD_SOURCES += lp4x-spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR SPD_SOURCES += lp4x-spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR, MT53E512M32D1NP-046 WT:B

1
src/mainboard/google/dedede/variants/drawcia/memory/dram_id.generated.txt
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@ -2,3 +2,4 @@ DRAM Part Name ID to assign
MT53E512M32D2NP-046 WT:E 0 (0000) MT53E512M32D2NP-046 WT:E 0 (0000)
H9HCNNNBKMMLXR-NEE 0 (0000) H9HCNNNBKMMLXR-NEE 0 (0000)
K4U6E3S4AA-MGCR 0 (0000) K4U6E3S4AA-MGCR 0 (0000)
MT53E512M32D1NP-046 WT:B 0 (0000)

1
src/mainboard/google/dedede/variants/drawcia/memory/mem_list_variant.txt
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@ -1,3 +1,4 @@
MT53E512M32D2NP-046 WT:E MT53E512M32D2NP-046 WT:E
H9HCNNNBKMMLXR-NEE H9HCNNNBKMMLXR-NEE
K4U6E3S4AA-MGCR K4U6E3S4AA-MGCR
MT53E512M32D1NP-046 WT:B