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AGESA binaryPI: Drop RAMBASE and RAMTOP 

With platforms moved to RELOCATABLE_RAMSTAGE, these
overrides no longer have a meaning.

Overrides existed because AGESA ramstage did not fit within
the default 1 MiB of RAMTOP - RAMBASE, when placed low.

Change-Id: I0185875dc550de74877c94f36128d5979e5553d6
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/26813
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kyösti Mälkki 2018-06-03 14:10:06 +03:00
parent 58175c7010
commit 3414f6035b
3 changed files with 0 additions and 20 deletions
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4
src/northbridge/amd/agesa/Kconfig
View File

@ -35,8 +35,4 @@ config HEAP_SIZE
hex hex
default 0xc0000 default 0xc0000
config RAMTOP
hex
default 0x400000
endif # NORTHBRIDGE_AMD_AGESA endif # NORTHBRIDGE_AMD_AGESA

8
src/northbridge/amd/pi/Kconfig
View File

@ -53,16 +53,8 @@ config HW_MEM_HOLE_SIZE_AUTO_INC
bool bool
default n default n
config RAMTOP
hex
default 0x1000000
config HEAP_SIZE config HEAP_SIZE
hex hex
default 0xc0000 default 0xc0000
config RAMBASE
hex
default 0x200000
endif # NORTHBRIDGE_AMD_PI endif # NORTHBRIDGE_AMD_PI

8
src/soc/amd/stoneyridge/Kconfig
View File

@ -143,18 +143,10 @@ config S3_VGA_ROM_RUN
bool bool
default n default n
config RAMTOP
hex
default 0x1000000
config HEAP_SIZE config HEAP_SIZE
hex hex
default 0xc0000 default 0xc0000
config RAMBASE
hex
default 0x200000
config SOUTHBRIDGE_AMD_STONEYRIDGE_SKIP_ISA_DMA_INIT config SOUTHBRIDGE_AMD_STONEYRIDGE_SKIP_ISA_DMA_INIT
bool bool
default n default n