soc/amd/*/smi.h: Move the pm_acpi_smi_cmd_port function declaration

This prototype will be used outside of soc/amd.

Change-Id: Icc69cf8a910764b27edf64f0f527b8f6a9013121
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45813
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/include/cpu/x86/smm.h

@@ -197,5 +197,8 @@ void smm_list_regions(void);
 /* Return the SMM save state revision. The revision can be fetched from the smm savestate
    which is always at the same offset downward from the top of the save state. */
 uint32_t smm_revision(void);
+/* Returns the PM ACPI SMI port. On Intel systems this typically not configurable (APM_CNT, 0xb2).
+   On AMD systems it is sometimes configurable. */
+uint16_t pm_acpi_smi_cmd_port(void);
 
 #endif /* CPU_X86_SMM_H */

src/soc/amd/picasso/include/soc/smi.h

@@ -214,7 +214,6 @@ struct sci_source {
 	uint8_t level;		/* Edge or Level,  smi_sci_dir */
 };
 
-uint16_t pm_acpi_smi_cmd_port(void);
 void configure_smi(uint8_t smi_num, uint8_t mode);
 void configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level);
 void configure_scimap(const struct sci_source *sci);

src/soc/amd/picasso/smi_util.c

@@ -5,6 +5,7 @@
  */
 
 #include <console/console.h>
+#include <cpu/x86/smm.h>
 #include <soc/southbridge.h>
 #include <soc/smi.h>
 #include <amdblocks/acpimmio.h>

src/soc/amd/stoneyridge/include/soc/smi.h

@@ -211,7 +211,6 @@ struct sci_source {
 	uint8_t level;		/* Edge or Level,  smi_sci_dir */
 };
 
-uint16_t pm_acpi_smi_cmd_port(void);
 void configure_smi(uint8_t smi_num, uint8_t mode);
 void configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level);
 void configure_scimap(const struct sci_source *sci);

src/soc/amd/stoneyridge/smi_util.c

@@ -5,6 +5,7 @@
  */
 
 #include <console/console.h>
+#include <cpu/x86/smm.h>
 #include <soc/southbridge.h>
 #include <soc/smi.h>
 #include <amdblocks/acpimmio.h>