Some minor fixes in it8716f/superio.c:
- Add Ward Vandewege <ward@gnu.org> as copyright holder. - Use explicit 'uint16_t' instead of 'unsigned long'. - Minor cosmetics. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2634 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -2,9 +2,9 @@
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* This file is part of the LinuxBIOS project.
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*
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* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* Copyright (C) 2007 AMD
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* Written by Yinghai Lu <yinghai.lu@amd.com> for AMD.
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* (Written by Yinghai Lu <yinghai.lu@amd.com> for AMD)
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* Copyright (C) 2007 Ward Vandewege <ward@gnu.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -26,9 +26,9 @@
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#include <console/console.h>
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#include <uart8250.h>
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#include <pc80/keyboard.h>
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#include <arch/io.h>
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#include "chip.h"
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#include "it8716f.h"
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#include <arch/io.h>
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/* Base address 0x2e: 0x87 0x01 0x55 0x55. */
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/* Base address 0x4e: 0x87 0x01 0x55 0xaa. */
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@ -50,29 +50,32 @@ static void pnp_exit_ext_func_mode(device_t dev)
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pnp_write_config(dev, 0x02, 0x02);
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}
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static void pnp_write_index(unsigned long port_base, uint8_t reg, uint8_t value)
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static void pnp_write_index(uint16_t port_base, uint8_t reg, uint8_t value)
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{
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outb(reg, port_base);
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outb(value, port_base + 1);
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}
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static uint8_t pnp_read_index(unsigned long port_base, uint8_t reg)
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static uint8_t pnp_read_index(uint16_t port_base, uint8_t reg)
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{
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outb(reg, port_base);
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return inb(port_base + 1);
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}
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static void init_ec(unsigned long base)
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static void init_ec(uint16_t base)
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{
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uint8_t value;
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// Read out current value of FAN_CTL Control register (0x14)
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/* Read out current value of FAN_CTL control register (0x14). */
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value = pnp_read_index(base, 0x14);
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printk_debug("FAN_CTL: reg = 0x%04x, read value = 0x%02x\r\n",base + 0x14, value);
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// Set FAN_CTL Control register (0x14) polarity to High, and activate fans 1, 2 and 3
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printk_debug("FAN_CTL: reg = 0x%04x, read value = 0x%02x\r\n",
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base + 0x14, value);
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/* Set FAN_CTL control register (0x14) polarity to high, and
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activate fans 1, 2 and 3. */
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pnp_write_index(base, 0x14, value | 0x87);
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printk_debug("FAN_CTL: reg = 0x%04x, writing value = 0x%02x\r\n",base + 0x14, value | 0x87);
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printk_debug("FAN_CTL: reg = 0x%04x, writing value = 0x%02x\r\n",
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base + 0x14, value | 0x87);
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}
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static void it8716f_init(device_t dev)
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@ -140,27 +143,28 @@ static struct device_operations ops = {
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};
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static struct pnp_info pnp_dev_info[] = {
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{ &ops, IT8716F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
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{ &ops, IT8716F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
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{ &ops, IT8716F_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
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{ &ops, IT8716F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
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{ &ops, IT8716F_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
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{ &ops, IT8716F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
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{ &ops, IT8716F_KBCM, PNP_IRQ0, },
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{&ops, IT8716F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0},},
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{&ops, IT8716F_SP1, PNP_IO0 | PNP_IRQ0, {0x7f8, 0},},
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{&ops, IT8716F_SP2, PNP_IO0 | PNP_IRQ0, {0x7f8, 0},},
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{&ops, IT8716F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0},},
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{&ops, IT8716F_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x7f8, 0},
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{0x7f8, 0x4},},
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{&ops, IT8716F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x7ff, 0},
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{0x7ff, 0x4},},
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{&ops, IT8716F_KBCM, PNP_IRQ0,},
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// No 7 { 0,},
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{ &ops, IT8716F_MIDI, PNP_IO0 | PNP_IRQ0, {0x7fe, 0x4}, },
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{ &ops, IT8716F_GAME, PNP_IO0, { 0x7ff, 0 }, },
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{ &ops, IT8716F_IR, },
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{&ops, IT8716F_MIDI, PNP_IO0 | PNP_IRQ0, {0x7fe, 0x4},},
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{&ops, IT8716F_GAME, PNP_IO0, {0x7ff, 0},},
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{&ops, IT8716F_IR,},
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};
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static void enable_dev(struct device *dev)
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{
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pnp_enable_devices(dev, &ops,
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sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
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sizeof(pnp_dev_info) / sizeof(pnp_dev_info[0]), pnp_dev_info);
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}
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struct chip_operations superio_ite_it8716f_ops = {
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CHIP_NAME("ITE IT8716F Super I/O")
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.enable_dev = enable_dev,
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};
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