added initial msr support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2212 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -75,6 +75,16 @@ sizeram(void)
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#define RRCF_LOW(base,properties) (base|(1<<8)|properties)
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#define RRCF_LOW(base,properties) (base|(1<<8)|properties)
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#define RRCF_LOW_CD(base) RRCF_LOW(base, CACHE_DISABLE)
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#define RRCF_LOW_CD(base) RRCF_LOW(base, CACHE_DISABLE)
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/* build initializer for P2D MSR */
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#define P2D_BM(msr, pdid1, bizarro, pbase, pmask) {msr, {.hi=(pdid1<<29)|(bizarro<<28)|(pbase>>24), .lo=(pbase<<8)|pmask}}
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#define P2D_BMO(msr, pdid1, bizarro, poffset, pbase, pmask) {msr, {.hi=(pdid1<<29)|(bizarro<<28)|(poffset<<8)|(pbase>>24), .lo=(pbase<<8)|pmask}}
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#define P2D_R(msr, pdid1, bizarro, pmax, pmin) {msr, {.hi=(pdid1<<29)|(bizarro<<28)|(pmax>>12), .lo=(pmax<<20)|pmin}}
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#define P2D_RO(msr, pdid1, bizarro, poffset, pmax, pmin) {msr, {.hi=(pdid1<<29)|(bizarro<<28)|(poffset<<8)|(pmax>>12), .lo=(pmax<<20)|pmin}}
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#define P2D_SC(msr, pdid1, bizarro, wen, ren,pscbase) {msr, {.hi=(pdid1<<29)|(bizarro<<28)|(wen), .lo=(ren<<16)|(pscbase>>18)}}
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#define IOD_BM(msr, pdid1, bizarro, ibase, imask) {msr, {.hi=(pdid1<<29)|(bizarro<<28)|(ibase>>12), .lo=(ibase<<20)|imask}}
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#define IOD_SC(msr, pdid1, bizarro, en, wen, ren, ibase) {msr, {.hi=(pdid1<<29)|(bizarro<<28), .lo=(en<<24)|(wen<<21)|(ren<<20)|(ibase<<3)}}
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struct msr_defaults {
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struct msr_defaults {
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int msr_no;
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int msr_no;
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@ -95,6 +105,15 @@ struct msr_defaults {
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{0x1811, {.hi = 0xefffb000, .lo = RRCF_LOW_CD(0xefff8000)}},
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{0x1811, {.hi = 0xefffb000, .lo = RRCF_LOW_CD(0xefff8000)}},
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{0x1812, {.hi = 0xefff7000, .lo = RRCF_LOW_CD(0xefff4000)}},
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{0x1812, {.hi = 0xefff7000, .lo = RRCF_LOW_CD(0xefff4000)}},
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{0x1813, {.hi = 0xefff3000, .lo = RRCF_LOW_CD(0xefff0000)}},
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{0x1813, {.hi = 0xefff3000, .lo = RRCF_LOW_CD(0xefff0000)}},
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/* now for GLPCI routing */
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/* GLIU0 */
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P2D_BM(0x10000020, 0x1, 0x0, 0x0, 0xfff80),
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P2D_BM(0x10000021, 0x1, 0x0, 0x80000, 0xfffe0),
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P2D_SC(0x1000002c, 0x1, 0x0, 0x0, 0xff03, 0x3),
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/* GLIU1 */
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P2D_BM(0x40000020, 0x1, 0x0, 0x0, 0xfff80),
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P2D_BM(0x40000021, 0x1, 0x0, 0x80000, 0xfffe0),
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P2D_SC(0x4000002d, 0x1, 0x0, 0x0, 0xff03, 0x3),
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{0}
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{0}
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};
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};
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@ -102,7 +121,6 @@ struct msr_defaults {
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static void
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static void
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setup_gx2_cache(int sizem)
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setup_gx2_cache(int sizem)
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{
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{
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int i;
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msr_t msr;
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msr_t msr;
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unsigned long long val;
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unsigned long long val;
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printk_debug("enable_cache: enable for %dm bytes\n", sizem);
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printk_debug("enable_cache: enable for %dm bytes\n", sizem);
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@ -128,14 +146,6 @@ setup_gx2_cache(int sizem)
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printk_debug("msr will be set to %x:%x\n", msr.hi, msr.lo);
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printk_debug("msr will be set to %x:%x\n", msr.hi, msr.lo);
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wrmsr(0x1808, msr);
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wrmsr(0x1808, msr);
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/* now do the default MSR values */
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for(i = 0; msr_defaults[i].msr_no; i++) {
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msr_t msr;
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wrmsr(msr_defaults[i].msr_no, msr_defaults[i].msr);
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msr = rdmsr(msr_defaults[i].msr_no);
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printk_debug("MSR 0x%x is now 0x%x:0x%x\n", msr_defaults[i].msr_no, msr.hi,msr.lo);
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}
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enable_cache();
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enable_cache();
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wbinvd();
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wbinvd();
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}
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}
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@ -143,10 +153,34 @@ setup_gx2_cache(int sizem)
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void
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void
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setup_gx2(void)
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setup_gx2(void)
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{
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{
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int sizem;
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int i;
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msr_t msr;
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unsigned long sizem, membytes;
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sizem = sizeram();
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sizem = sizeram();
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setup_gx2_cache(sizem);
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setup_gx2_cache(sizem);
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membytes = sizem * 1048576;
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/* we need to set 0x10000029 and 0x40000029 */
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msr.hi = 0x20000000 | membytes >>20;
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msr.lo = 0x100 | ( ((membytes >>12) & 0xfff) << 20);
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wrmsr(0x10000029, msr);
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wrmsr(0x40000029, msr);
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msr = rdmsr(0x10000029);
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printk_debug("MSR 0x%x is now 0x%x:0x%x\n", 0x10000029, msr.hi,msr.lo);
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msr = rdmsr(0x40000029);
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printk_debug("MSR 0x%x is now 0x%x:0x%x\n", 0x40000029, msr.hi,msr.lo);
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printk_debug("MSR 0x%x is now 0x%x:0x%x\n", 0x40000029, msr.hi,msr.lo);
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/* now do the default MSR values */
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for(i = 0; msr_defaults[i].msr_no; i++) {
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msr_t msr;
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wrmsr(msr_defaults[i].msr_no, msr_defaults[i].msr);
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msr = rdmsr(msr_defaults[i].msr_no);
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printk_debug("MSR 0x%x is now 0x%x:0x%x\n", msr_defaults[i].msr_no, msr.hi,msr.lo);
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}
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}
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}
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