From 344a1bd43c63dbfeb3cff04e63d531f32242aba4 Mon Sep 17 00:00:00 2001 From: Sridhar Siricilla Date: Thu, 5 Nov 2020 21:36:39 +0530 Subject: [PATCH] mb/intel/adlrvp: Configure GPIOs to enable DMIC The patch configures GPIO pins to enable DMIC. Signed-off-by: Sridhar Siricilla Change-Id: I2907737071f7d6b3c88c492d90edf8455d1fa50a Reviewed-on: https://review.coreboot.org/c/coreboot/+/47279 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik Reviewed-by: V Sowmya --- src/mainboard/intel/adlrvp/variants/adlrvp_p/gpio.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p/gpio.c b/src/mainboard/intel/adlrvp/variants/adlrvp_p/gpio.c index c7029fc10b..f91b94faf4 100644 --- a/src/mainboard/intel/adlrvp/variants/adlrvp_p/gpio.c +++ b/src/mainboard/intel/adlrvp/variants/adlrvp_p/gpio.c @@ -224,17 +224,17 @@ static const struct pad_config gpio_table[] = { /* SNDW1_DATA */ PAD_CFG_NF(GPP_S1, NONE, DEEP, NF1), /* SNDW2_CLK */ - PAD_CFG_NF(GPP_S2, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_S2, NONE, DEEP, NF2), /* SNDW2_DATA */ - PAD_CFG_NF(GPP_S3, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_S3, NONE, DEEP, NF2), /* SNDW3_CLK */ - PAD_CFG_NF(GPP_S4, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_S4, NONE, DEEP, NF2), /* SNDW3_DATA */ - PAD_CFG_NF(GPP_S5, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_S5, NONE, DEEP, NF2), /* SNDW4_CLK */ - PAD_CFG_NF(GPP_S6, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_S6, NONE, DEEP, NF2), /* SNDW4_DATA */ - PAD_CFG_NF(GPP_S7, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_S7, NONE, DEEP, NF2), /* SMB_CLK */ PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),