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veyron_brain: Remove unused USB GPIOs 

Brain doesn't have HOST1_PWR_EN (GPIO0_B3) and 5V_DRV (GPIO7_C5).
The only USB power enable pin connected to the AP is USB2_PWR_EN
(GPIO0_B4) which controls power for both the physical type-A ports.

BUG=none
BRANCH=none
TEST=built and booted on Brain, both USB host mode ports work

Change-Id: Iea371926c7dcd111aa2e671a15fe97a3519bfc04
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4db71095a5116666cd27aedb09b4f02557362346
Original-Change-Id: Ibbb4b9b424156eb3db1ccfdd948050c1c067ad3c
Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/271309
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/10305
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: David Hendricks <dhendrix@google.com>
This commit is contained in:
David Hendricks 2015-05-14 20:02:23 -07:00 committed by Patrick Georgi
parent 4e50cdd979
commit 34562eb088
1 changed files with 1 additions and 3 deletions
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4
src/mainboard/google/veyron_brain/mainboard.c
View File

@ -43,9 +43,7 @@
static void configure_usb(void)
{
gpio_output(GPIO(0, B, 3), 1); /* HOST1_PWR_EN */
gpio_output(GPIO(0, B, 4), 1); /* USBOTG_PWREN_H */
gpio_output(GPIO(7, C, 5), 1); /* 5V_DRV */
gpio_output(GPIO(0, B, 4), 1); /* USB2_PWR_EN */
}
static void configure_emmc(void)