GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Revert "mainboard/google/meowth: enable PCH iSCLK" 

This reverts commit 2e81f394cf, as it will
have side effect that will make system shutdown failure. System will not
enter S5 sleep state, instead a global reset will be generated.

Once camera driver ACPI framework ready, isclk programing will be moved
into APCI method, in _PS3, isclk will be turned off to save power.

BUG=b.72532565
BRANH=master
TEST=Apply the changes and flash coreboot, on meowth devices, issue
"halt" in OS stage, system can shutdown successfully.

Change-Id: If35697911f97c524d9b52bdf4dae5c9ef1cc8618
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/25006
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Lijian Zhao 2018-03-06 03:18:34 +00:00 committed by Patrick Georgi
parent 4132893808
commit 345d1e3962
1 changed files with 0 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/mainboard/google/zoombini/variants/meowth/devicetree.cb
View File

@ -56,9 +56,6 @@ chip soc/intel/cannonlake
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)" register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)"
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC3)" register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC3)"
# Enable Pch iSCLK
register "pch_isclk" = "1"
# Touchscreen Digitizer # Touchscreen Digitizer
register "i2c[0]" = "{ register "i2c[0]" = "{
.speed = I2C_SPEED_FAST_PLUS, .speed = I2C_SPEED_FAST_PLUS,