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arch/x86: Drop Kconfig AP_SIPI_VECTOR 

This was used to check romcc-built bootblock and romstage
agree about the location of 16-bit entrypoint. There was
no need to customize it as bootblock size requirement did
not grow. Just check for a fixed location at 4 GiB - 4 KiB.

With C_ENVIRONMENT_BOOTBLOCK we can have a proper symbol
for the purpose, since it appears in the same compilation
unit. It will adjust if C_ENV_BOOTBLOCK_SIZE changes.

Change-Id: I93f3c37e78ba587455c804de8c57e7e06832a81f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30854
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Kyösti Mälkki 2019-01-09 20:30:52 +02:00
parent 95b3ba5264
commit 34856579f8
5 changed files with 15 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/arch/x86/failover.ld
View File

@ -35,7 +35,6 @@ SECTIONS
/* This section might be better named .setup */
.rom ROMLOC : {
_rom = .;
ap_sipi_vector = .;
*(.rom.text);
*(.rom.data);
*(.rom.data.*);
@ -54,9 +53,7 @@ SECTIONS
(CONFIG_SIPI_VECTOR_IN_ROM ? 4096 : 0);
/* Post-check proper SIPI vector. */
_bogus = ASSERT(!CONFIG_SIPI_VECTOR_IN_ROM || ((ap_sipi_vector & 0x0fff) == 0x0),
"Bad SIPI vector alignment");
_bogus = ASSERT(!CONFIG_SIPI_VECTOR_IN_ROM || (ap_sipi_vector == CONFIG_AP_SIPI_VECTOR),
_bogus = ASSERT(!CONFIG_SIPI_VECTOR_IN_ROM || (ap_sipi_vector_in_rom == 0xff),
"Address mismatch on AP_SIPI_VECTOR");
/DISCARD/ : {

6
src/cpu/Kconfig
View File

@ -42,12 +42,6 @@ config SMP
This option is used to enable certain functions to make coreboot
work correctly on symmetric multi processor (SMP) systems.
config AP_SIPI_VECTOR
hex
default 0xfffff000
help
This must equal address of ap_sipi_vector from bootblock build.
config MMX
bool
help

8
src/cpu/intel/car/p4-netburst/cache_as_ram.S
View File

@ -23,7 +23,10 @@
/* Macro to access Local APIC registers at default base. */
#define LAPIC(x) $(LAPIC_DEFAULT_BASE | LAPIC_ ## x)
#define START_IPI_VECTOR ((CONFIG_AP_SIPI_VECTOR >> 12) & 0xff)
#if !IS_ENABLED(CONFIG_C_ENVIRONMENT_BOOTBLOCK)
/* Fixed location, ASSERTED in failover.ld if it changes. */
.set ap_sipi_vector_in_rom, 0xff
#endif
#define CACHE_AS_RAM_SIZE CONFIG_DCACHE_RAM_SIZE
#define CACHE_AS_RAM_BASE CONFIG_DCACHE_RAM_BASE
@ -180,7 +183,8 @@ hyper_threading_cpu:
/* Send Start IPI to all excluding ourself. */
movl LAPIC(ICR), %edi
movl $(LAPIC_DEST_ALLBUT | LAPIC_DM_STARTUP | START_IPI_VECTOR), %eax
movl $(LAPIC_DEST_ALLBUT | LAPIC_DM_STARTUP), %eax
orl $ap_sipi_vector_in_rom, %eax
1: movl %eax, (%edi)
movl $0x30, %ecx
2: pause

7
src/cpu/x86/16bit/entry16.inc
View File

@ -28,6 +28,13 @@
*/
#include <arch/rom_segs.h>
#if IS_ENABLED(CONFIG_SIPI_VECTOR_IN_ROM)
/* Symbol _start16bit must be aligned to 4kB to start AP CPUs with
* Startup IPI message without RAM.
*/
.align 4096
#endif
.code16
.globl _start16bit
.type _start16bit, @function

1
src/cpu/x86/16bit/entry16.ld
View File

@ -1,2 +1,3 @@
gdtptr16_offset = gdtptr16 & 0xffff;
nullidt_offset = nullidt & 0xffff;
ap_sipi_vector_in_rom = (_start16bit >> 12) & 0xff;