mb/google/volteer: add touchscreen entry to Volteer
BUG=b:149588766 TEST=ELAN and Goodix touchscreen works. Signed-off-by: Alex Levin <levinale@chromium.org> Change-Id: I1c3e75eb03a8ab434ee58bf36a155f2255612083 Reviewed-on: https://review.coreboot.org/c/coreboot/+/40551 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
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@ -3,6 +3,7 @@ config BOARD_GOOGLE_BASEBOARD_VOLTEER
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select BOARD_ROMSIZE_KB_32768
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select DRIVERS_GENERIC_MAX98357A
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select DRIVERS_I2C_GENERIC
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select DRIVERS_I2C_HID
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select DRIVERS_SPI_ACPI
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC_BOARDID
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@ -251,7 +251,37 @@ chip soc/intel/tigerlake
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device i2c 1a on end
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end
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end # I2C #0 0xA0E8
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device pci 15.1 on end # I2C1 0xA0E9
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device pci 15.1 on
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chip drivers/i2c/hid
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register "generic.hid" = ""GDIX0000""
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register "generic.desc" = ""Goodix Touchscreen""
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register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_E7_IRQ)"
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register "generic.probed" = "1"
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register "generic.reset_gpio" =
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"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C10)"
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register "generic.reset_delay_ms" = "120"
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register "generic.reset_off_delay_ms" = "3"
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register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)"
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register "generic.enable_delay_ms" = "12"
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register "generic.has_power_resource" = "1"
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register "hid_desc_reg_offset" = "0x01"
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device i2c 14 on end
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end
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chip drivers/i2c/hid
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register "generic.hid" = ""ELAN90FC""
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register "generic.desc" = ""ELAN Touchscreen""
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register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPP_E7_IRQ)"
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register "generic.probed" = "1"
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register "generic.reset_gpio" =
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"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C10)"
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register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)"
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register "generic.reset_delay_ms" = "20"
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register "generic.has_power_resource" = "1"
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register "generic.disable_gpio_export_in_crs" = "1"
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register "hid_desc_reg_offset" = "0x01"
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device i2c 10 on end
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end
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end # I2C1 0xA0E9
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device pci 15.2 on
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chip drivers/i2c/sx9310
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register "desc" = ""SAR0 Proximity Sensor""
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@ -23,7 +23,7 @@ static const struct pad_config gpio_table[] = {
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/* A7 : I2S2_SCLK ==> EN_PP3300_TRACKPAD */
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PAD_CFG_GPO(GPP_A7, 1, DEEP),
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/* A8 : I2S2_SFRM ==> EN_PP3300_TOUCHSCREEN */
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PAD_CFG_GPO(GPP_A8, 1, DEEP),
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PAD_CFG_GPO(GPP_A8, 0, DEEP),
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/* A9 : I2S2_TXD ==> EC_IN_RW_OD */
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PAD_CFG_GPI(GPP_A9, NONE, DEEP),
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/* A10 : I2S2_RXD ==> EN_SPKR_PA */
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@ -125,7 +125,7 @@ static const struct pad_config gpio_table[] = {
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/* C9 : UART0_TXD ==> UART_PCH_TX_DEBUG_RX */
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PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),
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/* C10 : UART0_RTS# ==> USI_RST_L */
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PAD_CFG_GPO(GPP_C10, 1, DEEP),
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PAD_CFG_GPO(GPP_C10, 0, DEEP),
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/* C11 : UART0_CTS# ==> CVF_LPSS_INT_L */
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PAD_CFG_GPI(GPP_C11, NONE, DEEP),
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/* C12 : UART1_RXD ==> MEM_STRAP_0 */
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@ -210,7 +210,7 @@ static const struct pad_config gpio_table[] = {
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/* E6 : THC0_SPI1_RST# ==> GPPE6_STRAP */
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PAD_NC(GPP_E6, NONE),
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/* E7 : CPU_GP1 ==> USI_INT */
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PAD_CFG_GPI(GPP_E7, NONE, DEEP),
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PAD_CFG_GPI_APIC(GPP_E7, NONE, PLTRST, LEVEL, NONE),
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/* E8 : SPI1_CS1# ==> SLP_S0IX */
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PAD_CFG_GPO(GPP_E8, 0, DEEP),
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/* E9 : USB2_OC0# ==> USB_C1_OC_ODL */
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