mb/google/nissa/var/craaskov: Implement touchscreen power sequencing

For brya variants with a touchscreen, drive the enable GPIO high
starting in romstage while holding in reset, then disable the reset
GPIO in ramstage (done in the baseboard).

BUG=b:317746281
TEST=emerge-nissa coreboot chromeos-bootimage

Change-Id: I3ca2e2d12a86eaae9e37870a2541c0287e354690
Signed-off-by: Rex Chou <rex_chou@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79764
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Reviewed-by: Ian Feng <ian_feng@compal.corp-partner.google.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/google/brya/variants/craaskov/Makefile.inc

@@ -1,6 +1,8 @@
 # SPDX-License-Identifier: GPL-2.0-or-later
 bootblock-y += gpio.c
 
+romstage-y += gpio.c
+
 ramstage-y += gpio.c
 ramstage-y += variant.c
 ramstage-$(CONFIG_FW_CONFIG) += fw_config.c

src/mainboard/google/brya/variants/craaskov/gpio.c

@@ -63,6 +63,14 @@ static const struct pad_config early_gpio_table[] = {
 	PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
 };
 
+static const struct pad_config romstage_gpio_table[] = {
+	/* Enable touchscreen, hold in reset */
+	/* C0  : SMBCLK ==> EN_PP3300_TCHSCR */
+	PAD_CFG_GPO(GPP_C0, 1, DEEP),
+	/* C1  : SMBDATA ==> USI_RST_L */
+	PAD_CFG_GPO(GPP_C1, 0, DEEP),
+};
+
 const struct pad_config *variant_gpio_override_table(size_t *num)
 {
 	*num = ARRAY_SIZE(override_gpio_table);
@@ -74,3 +82,9 @@ const struct pad_config *variant_early_gpio_table(size_t *num)
 	*num = ARRAY_SIZE(early_gpio_table);
 	return early_gpio_table;
 }
+
+const struct pad_config *variant_romstage_gpio_table(size_t *num)
+{
+	*num = ARRAY_SIZE(romstage_gpio_table);
+	return romstage_gpio_table;
+}