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mb/google/rex: Avoid hang for pre-prod SoC by setting SAGV_POINTS_0_1_2 

Intel has identified an idle hang issue on pre-prod silicon that will
not be fixed or root-caused. To avoid the issue, this commit sets
SaGvWpMask to SAGV_POINTS_0_1_2 in the devicetree.

Note: This change will affect system power.

BUG=b:287170545
TEST=Able to idle for more than 5+ hours without any hang on
google/screebo.

Change-Id: Id0b8db0076d983d336c3bec6d6c33614c69964d1
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78794
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2023-10-31 11:21:09 +05:30
parent 08db7cd0d0
commit 35348fc005
2 changed files with 4 additions and 0 deletions
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2
src/mainboard/google/rex/variants/baseboard/ovis/devicetree_pre_prod.cb
View File

@ -52,6 +52,8 @@ chip soc/intel/meteorlake
register "cnvi_bt_core" = "true" register "cnvi_bt_core" = "true"
register "sagv" = "SAGV_ENABLED" register "sagv" = "SAGV_ENABLED"
# TODO(b/287170545): workaround avoid DUT random hang
register "sagv_wp_bitmap" = "SAGV_POINTS_0_1_2"
register "sagv_freq_mhz[0]" = "3200" register "sagv_freq_mhz[0]" = "3200"
register "sagv_gear[0]" = "4" register "sagv_gear[0]" = "4"

2
src/mainboard/google/rex/variants/baseboard/rex/devicetree_pre_prod.cb
View File

@ -49,6 +49,8 @@ chip soc/intel/meteorlake
register "cnvi_bt_core" = "true" register "cnvi_bt_core" = "true"
register "sagv" = "SAGV_ENABLED" register "sagv" = "SAGV_ENABLED"
# TODO(b/287170545): workaround avoid DUT random hang
register "sagv_wp_bitmap" = "SAGV_POINTS_0_1_2"
register "sagv_freq_mhz[0]" = "3200" register "sagv_freq_mhz[0]" = "3200"
register "sagv_gear[0]" = "4" register "sagv_gear[0]" = "4"