payloads: Rename Makefiles from .inc to .mk

The .inc suffix is confusing to various tools as it's not specific to
Makefiles. This means that editors don't recognize the files, and don't
open them with highlighting and any other specific editor functionality.

This issue is also seen in the release notes generation script where
Makefiles get renamed before running cloc.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Ie7038712de8cc646632d5e7d29550e3260bf2c62
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80103
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

payloads/libpayload/Makefile

@@ -56,7 +56,7 @@ export KCONFIG_NEGATIVES := 1
 export KBUILD_KCONFIG := Kconfig
 export CONFIG_ := CONFIG_LP_
 
-# directory containing the toplevel Makefile.inc
+# directory containing the toplevel Makefile.mk
 TOPLEVEL := .
 
 CONFIG_LP_SHELL := sh
@@ -159,8 +159,8 @@ $(xcompile): $(top)/../../util/xcompile/xcompile
 	\mv -f $@.tmp $@ 2> /dev/null
 
 ifeq ($(NOCOMPILE),1)
-include $(TOPLEVEL)/Makefile.inc
-include $(TOPLEVEL)/tests/Makefile.inc
+include $(TOPLEVEL)/Makefile.mk
+include $(TOPLEVEL)/tests/Makefile.mk
 real-all: config
 
 else
@@ -285,7 +285,7 @@ add-special-class= \
 	$(eval $(1):=) \
 	$(eval special-classes+=$(1))
 
-# Clean -y variables, include Makefile.inc
+# Clean -y variables, include Makefile.mk
 # Add paths to files in X-y to X-srcs
 # Add subdirs-y to subdirs
 includemakefiles= \
@@ -308,7 +308,7 @@ evaluate_subdirs= \
 	$(eval cursubdirs:=$(subdirs)) \
 	$(eval subdirs:=) \
 	$(foreach dir,$(cursubdirs), \
-		$(eval $(call includemakefiles,$(dir)/Makefile.inc))) \
+		$(eval $(call includemakefiles,$(dir)/Makefile.mk))) \
 	$(if $(subdirs),$(eval $(call evaluate_subdirs)))
 
 # collect all object files eligible for building or run unit-tests
@@ -316,7 +316,7 @@ ifneq ($(UNIT_TEST),1)
 subdirs:=$(TOPLEVEL)
 $(eval $(call evaluate_subdirs))
 else
-include $(TOPLEVEL)/tests/Makefile.inc
+include $(TOPLEVEL)/tests/Makefile.mk
 endif
 
 # Converts one or more source file paths to the corresponding build/ paths.

payloads/libpayload/tests/Makefile.mk

@@ -105,7 +105,7 @@ define TEST_CC_template
 $(1)-config-file := $(testobj)/$(1)/libpayload-config.h
 $$($(1)-config-file): $(TEST_KCONFIG_AUTOHEADER)
 	mkdir -p $$(dir $$@);
-	printf '// File generated by tests/Makefile.inc\n// Do not change\n' > $$@;
+	printf '// File generated by tests/Makefile.mk\n// Do not change\n' > $$@;
 	printf '#ifndef TEST_LIBPAYLOAD_CONFIG_H_\n' >> $$@;
 	printf '#define TEST_LIBPAYLOAD_CONFIG_H_\n' >> $$@;
 	printf '#include <%s>\n\n' "$(notdir $(TEST_KCONFIG_AUTOHEADER))" >> $$@;

util/lint/kconfig_lint

@@ -36,7 +36,7 @@ my $exclude_dirs_and_files =
   '^build/\|^coreboot-builds/\|^configs/\|^util/\|^\.git/\|^payloads\|^Documentation\|^3rdparty'
   . '\|' .                            # directories to exclude when searching for used symbols
   '\.config\|\.txt$\|\.tex$\|\.tags\|/kconfig.h\|\.fmd'; #files to exclude when looking for symbols
-my $payload_files_to_check='payloads/Makefile.mk payloads/external/Makefile.inc';
+my $payload_files_to_check='payloads/Makefile.mk payloads/external/Makefile.mk';
 my $config_file = "";                 # name of config file to load symbol values from.
 my @wholeconfig;                      # document the entire kconfig structure
 my %loaded_files;                     # list of each Kconfig file loaded