- Bug fixes to the P-III support

- Initial Pentium-M support


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1718 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/cpu/intel/model_69x/Config.lb

@@ -0,0 +1,9 @@
+dir /cpu/x86/tsc
+dir /cpu/x86/mtrr
+dir /cpu/x86/fpu
+dir /cpu/x86/mmx
+dir /cpu/x86/sse
+dir /cpu/x86/lapic
+dir /cpu/x86/cache
+dir /cpu/intel/microcode
+driver model_69x_init.o

src/cpu/intel/model_69x/model_69x_init.c

@@ -0,0 +1,49 @@
+#include <console/console.h>
+#include <device/device.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <string.h>
+#include <cpu/cpu.h>
+#include <cpu/x86/mtrr.h>
+#include <cpu/x86/msr.h>
+#include <cpu/x86/lapic.h>
+#include <cpu/intel/microcode.h>
+#include <cpu/x86/cache.h>
+#include <cpu/x86/mtrr.h>
+
+static uint32_t microcode_updates[] = {
+	/*  Dummy terminator  */
+        0x0, 0x0, 0x0, 0x0,
+        0x0, 0x0, 0x0, 0x0,
+        0x0, 0x0, 0x0, 0x0,
+        0x0, 0x0, 0x0, 0x0,
+};
+
+
+static void model_69x_init(device_t dev)
+{
+	/* Turn on caching if we haven't already */
+	x86_enable_cache();
+	x86_mtrr_check();
+	
+	/* Update the microcode */
+	intel_update_microcode(microcode_updates);
+
+	/* Enable the local cpu apics */
+	setup_lapic();
+};
+
+static struct device_operations cpu_dev_ops = {
+	.init     = model_69x_init,
+};
+static struct cpu_device_id cpu_table[] = {
+#if 0
+	{ X86_VENDOR_INTEL, 0x0695 }, /* Pentium M */
+#endif
+	{ 0, 0 },
+};
+
+static struct cpu_driver driver __cpu_driver = {
+	.ops      = &cpu_dev_ops,
+	.id_table = cpu_table,
+};

src/cpu/intel/model_6dx/Config.lb

@@ -0,0 +1,9 @@
+dir /cpu/x86/tsc
+dir /cpu/x86/mtrr
+dir /cpu/x86/fpu
+dir /cpu/x86/mmx
+dir /cpu/x86/sse
+dir /cpu/x86/lapic
+dir /cpu/x86/cache
+dir /cpu/intel/microcode
+driver model_6dx_init.o

src/cpu/intel/model_6dx/model_6dx_init.c

@@ -0,0 +1,49 @@
+#include <console/console.h>
+#include <device/device.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <string.h>
+#include <cpu/cpu.h>
+#include <cpu/x86/mtrr.h>
+#include <cpu/x86/msr.h>
+#include <cpu/x86/lapic.h>
+#include <cpu/intel/microcode.h>
+#include <cpu/x86/cache.h>
+#include <cpu/x86/mtrr.h>
+
+static uint32_t microcode_updates[] = {
+	/*  Dummy terminator  */
+        0x0, 0x0, 0x0, 0x0,
+        0x0, 0x0, 0x0, 0x0,
+        0x0, 0x0, 0x0, 0x0,
+        0x0, 0x0, 0x0, 0x0,
+};
+
+
+static void model_6dx_init(device_t dev)
+{
+	/* Turn on caching if we haven't already */
+	x86_enable_cache();
+	x86_mtrr_check();
+	
+	/* Update the microcode */
+	intel_update_microcode(microcode_updates);
+
+	/* Enable the local cpu apics */
+	setup_lapic();
+};
+
+static struct device_operations cpu_dev_ops = {
+	.init     = model_6dx_init,
+};
+static struct cpu_device_id cpu_table[] = {
+#if 0
+	{ X86_VENDOR_INTEL, 0x06D6 }, /* Pentium M on 90nm with 2MiB of L2 cache */
+#endif
+	{ 0, 0 },
+};
+
+static struct cpu_driver driver __cpu_driver = {
+	.ops      = &cpu_dev_ops,
+	.id_table = cpu_table,
+};

src/cpu/intel/model_6xx/model_6xx_init.c

@@ -26,7 +26,7 @@ static uint32_t microcode_updates[] = {
 };
 
 
-static void model_f0x_init(device_t dev)
+static void model_6xx_init(device_t dev)
 {
 	/* Turn on caching if we haven't already */
 	x86_enable_cache();
@@ -40,7 +40,7 @@ static void model_f0x_init(device_t dev)
 };
 
 static struct device_operations cpu_dev_ops = {
-	.init     = model_f0x_init,
+	.init     = model_6xx_init,
 };
 static struct cpu_device_id cpu_table[] = {
 	{ X86_VENDOR_INTEL, 0x0672 },

src/cpu/intel/socket_mPGA479M/Config.lb

@@ -0,0 +1,4 @@
+config chip.h
+object socket_mPGA479M.o
+dir /cpu/intel/model_69x
+dir /cpu/intel/model_6dx

src/cpu/intel/socket_mPGA479M/chip.h

@@ -0,0 +1,4 @@
+extern struct chip_operations cpu_intel_socket_mPGA479_control;
+
+struct cpu_intel_socket_mPGA479_config {
+};

src/cpu/intel/socket_mPGA479M/socket_mPGA479M.c

@@ -0,0 +1,7 @@
+#include <device/device.h>
+#include "chip.h"
+
+
+struct chip_opertations cpu_intel_socket_mPGA479M_control = {
+	.name = "socket mPGA479M",
+};

src/cpu/intel/socket_mPGA603/chip.h

@@ -1,4 +1,4 @@
-extern struct chip_operations cpu_intel_socket_mPGA603_400Mhz_control;
+extern struct chip_operations cpu_intel_socket_mPGA603_control;
 
-struct cpu_intel_socket_mPGA603_400Mhz_config {
+struct cpu_intel_socket_mPGA603_config {
 };

src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c

@@ -2,6 +2,6 @@
 #include "chip.h"
 
 
-struct chip_opertations cpu_intel_socket_mPGA603_400Mhz_control = {
+struct chip_opertations cpu_intel_socket_mPGA603_control = {
 	.name = "socket mPGA603_400Mhz",
 };