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cpu/intel/model_2065x: Don't use a magic APIC 

Move the chip configuration to the cpu cluster device.

It looks like none of the devicetree were featuring a lapic 0xacac,
nor was tcc_offset ever set, so this remains a NOP.

Change-Id: I296631511b0e31b0ed43ca8193552483bdab4482
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59315
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Arthur Heymans 2021-11-15 20:11:45 +01:00 committed by Felix Held
parent a5fa534705
commit 3627f2903c
5 changed files with 9 additions and 28 deletions
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3
src/cpu/intel/model_2065x/chip.h
View File

@ -1,8 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
/* Magic value used to locate this chip in the device tree */
#define SPEEDSTEP_APIC_MAGIC 0xACAC
struct cpu_intel_model_2065x_config { struct cpu_intel_model_2065x_config {
int tcc_offset; /* TCC Activation Offset */ int tcc_offset; /* TCC Activation Offset */
}; };

13
src/cpu/intel/model_2065x/model_2065x_init.c
View File

@ -20,18 +20,11 @@
#include <smp/node.h> #include <smp/node.h>
#include <types.h> #include <types.h>
static void configure_thermal_target(void) static void configure_thermal_target(struct device *dev)
{ {
struct cpu_intel_model_2065x_config *conf; struct cpu_intel_model_2065x_config *conf = dev->bus->dev->chip_info;
struct device *lapic;
msr_t msr; msr_t msr;
/* Find pointer to CPU configuration */
lapic = dev_find_lapic(SPEEDSTEP_APIC_MAGIC);
if (!lapic || !lapic->chip_info)
return;
conf = lapic->chip_info;
/* Set TCC activation offset if supported */ /* Set TCC activation offset if supported */
msr = rdmsr(MSR_PLATFORM_INFO); msr = rdmsr(MSR_PLATFORM_INFO);
if ((msr.lo & (1 << 30)) && conf->tcc_offset) { if ((msr.lo & (1 << 30)) && conf->tcc_offset) {
@ -101,7 +94,7 @@ static void model_2065x_init(struct device *cpu)
configure_misc(); configure_misc();
/* Thermal throttle activation offset */ /* Thermal throttle activation offset */
configure_thermal_target(); configure_thermal_target(cpu);
/* Set Max Ratio */ /* Set Max Ratio */
set_max_ratio(); set_max_ratio();

5
src/mainboard/lenovo/t410/devicetree.cb
View File

@ -17,11 +17,8 @@ chip northbridge/intel/ironlake
register "gpu_cpu_backlight" = "0x58d" register "gpu_cpu_backlight" = "0x58d"
register "gpu_pch_backlight" = "0x061a061a" register "gpu_pch_backlight" = "0x061a061a"
device cpu_cluster 0 on
ops ironlake_cpu_bus_ops
chip cpu/intel/model_2065x chip cpu/intel/model_2065x
device lapic 0 on end device cpu_cluster 0 on ops ironlake_cpu_bus_ops end
end
end end
device domain 0 on device domain 0 on

5
src/mainboard/lenovo/x201/devicetree.cb
View File

@ -18,11 +18,8 @@ chip northbridge/intel/ironlake
register "gpu_cpu_backlight" = "0x58d" register "gpu_cpu_backlight" = "0x58d"
register "gpu_pch_backlight" = "0x061a061a" register "gpu_pch_backlight" = "0x061a061a"
device cpu_cluster 0 on
ops ironlake_cpu_bus_ops
chip cpu/intel/model_2065x chip cpu/intel/model_2065x
device lapic 0 on end device cpu_cluster 0 on ops ironlake_cpu_bus_ops end
end
end end
device domain 0 on device domain 0 on

5
src/mainboard/packardbell/ms2290/devicetree.cb
View File

@ -18,11 +18,8 @@ chip northbridge/intel/ironlake
register "gpu_cpu_backlight" = "0x58d" register "gpu_cpu_backlight" = "0x58d"
register "gpu_pch_backlight" = "0x061a061a" register "gpu_pch_backlight" = "0x061a061a"
device cpu_cluster 0 on
ops ironlake_cpu_bus_ops
chip cpu/intel/model_2065x chip cpu/intel/model_2065x
device lapic 0 on end device cpu_cluster 0 on ops ironlake_cpu_bus_ops end
end
end end
device domain 0 on device domain 0 on