mainboard/ibase/mb899: Break out superio hwm conf from mainboard
Break out the PNP Super I/O HWM configuration from mainboard.c Change-Id: Ib4c7f26c7fa2a9845250a61a23c75cb9e440ab93 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5797 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
This commit is contained in:
parent
e93fe23440
commit
3628f93cf5
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@ -0,0 +1 @@
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ramstage-y += superio_hwm.c
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@ -27,6 +27,8 @@
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#include <arch/io.h>
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#include <arch/io.h>
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#include <arch/interrupt.h>
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#include <arch/interrupt.h>
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#include "superio_hwm.h"
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#if CONFIG_VGA_ROM_RUN
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#if CONFIG_VGA_ROM_RUN
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static int int15_handler(void)
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static int int15_handler(void)
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{
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{
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@ -63,140 +65,6 @@ static int int15_handler(void)
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}
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}
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#endif
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#endif
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/* Hardware Monitor */
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static u16 hwm_base = 0x290;
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static void hwm_write(u8 reg, u8 value)
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{
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outb(reg, hwm_base + 0x05);
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outb(value, hwm_base + 0x06);
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}
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static void hwm_bank(u8 bank)
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{
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hwm_write(0x4e, bank);
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}
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#define FAN_CRUISE_CONTROL_DISABLED 0
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#define FAN_CRUISE_CONTROL_SPEED 1
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#define FAN_CRUISE_CONTROL_THERMAL 2
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#define FAN_SPEED_5625 0
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//#define FAN_TEMPERATURE_30DEGC 0
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struct fan_speed {
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u8 fan_in;
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u16 fan_speed;
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};
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// FANIN Target Speed Register
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// FANIN = 337500 / RPM
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struct fan_speed fan_speeds[] = {
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{ 0x3c, 5625 }, { 0x41, 5192 }, { 0x47, 4753 }, { 0x4e, 4326 },
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{ 0x56, 3924 }, { 0x5f, 3552 }, { 0x69, 3214 }, { 0x74, 2909 },
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{ 0x80, 2636 }, { 0x8d, 2393 }, { 0x9b, 2177 }, { 0xaa, 1985 },
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{ 0xba, 1814 }, { 0xcb, 1662 }, { 0xdd, 1527 }, { 0xf0, 1406 }
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};
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struct temperature {
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u8 deg_celsius;
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u8 deg_fahrenheit;
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};
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struct temperature temperatures[] = {
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{ 30, 86 }, { 33, 91 }, { 36, 96 }, { 39, 102 },
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{ 42, 107 }, { 45, 113 }, { 48, 118 }, { 51, 123 },
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{ 54, 129 }, { 57, 134 }, { 60, 140 }, { 63, 145 },
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{ 66, 150 }, { 69, 156 }, { 72, 161 }, { 75, 167 }
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};
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static void hwm_setup(void)
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{
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int cpufan_control = 0, sysfan_control = 0;
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int cpufan_speed = 0, sysfan_speed = 0;
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int cpufan_temperature = 0, sysfan_temperature = 0;
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if (get_option(&cpufan_control, "cpufan_cruise_control") != CB_SUCCESS)
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cpufan_control = FAN_CRUISE_CONTROL_DISABLED;
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if (get_option(&cpufan_speed, "cpufan_speed") != CB_SUCCESS)
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cpufan_speed = FAN_SPEED_5625;
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//if (get_option(&cpufan_temperature, "cpufan_temperature") != CB_SUCCESS)
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// cpufan_temperature = FAN_TEMPERATURE_30DEGC;
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if (get_option(&sysfan_control, "sysfan_cruise_control") != CB_SUCCESS)
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sysfan_control = FAN_CRUISE_CONTROL_DISABLED;
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if (get_option(&sysfan_speed, "sysfan_speed") != CB_SUCCESS)
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sysfan_speed = FAN_SPEED_5625;
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//if (get_option(&sysfan_temperature, "sysfan_temperature") != CB_SUCCESS)
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// sysfan_temperature = FAN_TEMPERATURE_30DEGC;
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// hwm_write(0x31, 0x20); // AVCC high limit
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// hwm_write(0x34, 0x06); // VIN2 low limit
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hwm_bank(0);
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hwm_write(0x59, 0x20); // Diode Selection
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hwm_write(0x5d, 0x0f); // All Sensors Diode, not Thermistor
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hwm_bank(4);
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hwm_write(0x54, 0xf1); // SYSTIN temperature offset
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hwm_write(0x55, 0x19); // CPUTIN temperature offset
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hwm_write(0x56, 0xfc); // AUXTIN temperature offset
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hwm_bank(0x80); // Default
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u8 fan_config = 0;
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// 00 FANOUT is Manual Mode
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// 01 FANOUT is Thermal Cruise Mode
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// 10 FANOUT is Fan Speed Cruise Mode
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switch (cpufan_control) {
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case FAN_CRUISE_CONTROL_SPEED: fan_config |= (2 << 4); break;
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case FAN_CRUISE_CONTROL_THERMAL: fan_config |= (1 << 4); break;
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}
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switch (sysfan_control) {
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case FAN_CRUISE_CONTROL_SPEED: fan_config |= (2 << 2); break;
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case FAN_CRUISE_CONTROL_THERMAL: fan_config |= (1 << 2); break;
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}
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// This register must be written first
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hwm_write(0x04, fan_config);
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switch (cpufan_control) {
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case FAN_CRUISE_CONTROL_SPEED:
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printk(BIOS_DEBUG, "Fan Cruise Control setting CPU fan to %d RPM\n",
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fan_speeds[cpufan_speed].fan_speed);
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hwm_write(0x06, fan_speeds[cpufan_speed].fan_in); // CPUFANIN target speed
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break;
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case FAN_CRUISE_CONTROL_THERMAL:
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printk(BIOS_DEBUG, "Fan Cruise Control setting CPU fan to activation at %d deg C/%d deg F\n",
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temperatures[cpufan_temperature].deg_celsius,
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temperatures[cpufan_temperature].deg_fahrenheit);
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hwm_write(0x06, temperatures[cpufan_temperature].deg_celsius); // CPUFANIN target temperature
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break;
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}
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switch (sysfan_control) {
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case FAN_CRUISE_CONTROL_SPEED:
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printk(BIOS_DEBUG, "Fan Cruise Control setting system fan to %d RPM\n",
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fan_speeds[sysfan_speed].fan_speed);
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hwm_write(0x05, fan_speeds[sysfan_speed].fan_in); // SYSFANIN target speed
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break;
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case FAN_CRUISE_CONTROL_THERMAL:
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printk(BIOS_DEBUG, "Fan Cruise Control setting system fan to activation at %d deg C/%d deg F\n",
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temperatures[sysfan_temperature].deg_celsius,
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temperatures[sysfan_temperature].deg_fahrenheit);
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hwm_write(0x05, temperatures[sysfan_temperature].deg_celsius); // SYSFANIN target temperature
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break;
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}
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hwm_write(0x0e, 0x02); // Fan Output Step Down Time
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hwm_write(0x0f, 0x02); // Fan Output Step Up Time
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hwm_write(0x47, 0xaf); // FAN divisor register
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hwm_write(0x4b, 0x84); // AUXFANIN speed divisor
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hwm_write(0x40, 0x01); // Init, but no SMI#
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}
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/* Audio Setup */
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/* Audio Setup */
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extern u32 * cim_verb_data;
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extern u32 * cim_verb_data;
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@ -0,0 +1,161 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007-2009 coresystems GmbH
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* Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <types.h>
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#include <arch/io.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <pc80/mc146818rtc.h>
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#include "superio_hwm.h"
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/* Hardware Monitor */
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#define FAN_CRUISE_CONTROL_DISABLED 0
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#define FAN_CRUISE_CONTROL_SPEED 1
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#define FAN_CRUISE_CONTROL_THERMAL 2
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#define FAN_SPEED_5625 0
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//#define FAN_TEMPERATURE_30DEGC 0
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#define HWM_BASE 0x290
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static void hwm_write(u8 reg, u8 value)
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{
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outb(reg, HWM_BASE + 0x05);
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outb(value, HWM_BASE + 0x06);
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}
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static void hwm_bank(u8 bank)
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{
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hwm_write(0x4e, bank);
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}
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struct fan_speed {
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u8 fan_in;
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u16 fan_speed;
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};
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// FANIN Target Speed Register
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// FANIN = 337500 / RPM
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struct fan_speed fan_speeds[] = {
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{ 0x3c, 5625 }, { 0x41, 5192 }, { 0x47, 4753 }, { 0x4e, 4326 },
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{ 0x56, 3924 }, { 0x5f, 3552 }, { 0x69, 3214 }, { 0x74, 2909 },
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{ 0x80, 2636 }, { 0x8d, 2393 }, { 0x9b, 2177 }, { 0xaa, 1985 },
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{ 0xba, 1814 }, { 0xcb, 1662 }, { 0xdd, 1527 }, { 0xf0, 1406 }
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};
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struct temperature {
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u8 deg_celsius;
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u8 deg_fahrenheit;
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};
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struct temperature temperatures[] = {
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{ 30, 86 }, { 33, 91 }, { 36, 96 }, { 39, 102 },
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{ 42, 107 }, { 45, 113 }, { 48, 118 }, { 51, 123 },
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{ 54, 129 }, { 57, 134 }, { 60, 140 }, { 63, 145 },
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{ 66, 150 }, { 69, 156 }, { 72, 161 }, { 75, 167 }
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};
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void hwm_setup(void)
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{
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int cpufan_control = 0, sysfan_control = 0;
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int cpufan_speed = 0, sysfan_speed = 0;
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int cpufan_temperature = 0, sysfan_temperature = 0;
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if (get_option(&cpufan_control, "cpufan_cruise_control") != CB_SUCCESS)
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cpufan_control = FAN_CRUISE_CONTROL_DISABLED;
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if (get_option(&cpufan_speed, "cpufan_speed") != CB_SUCCESS)
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cpufan_speed = FAN_SPEED_5625;
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//if (get_option(&cpufan_temperature, "cpufan_temperature") != CB_SUCCESS)
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// cpufan_temperature = FAN_TEMPERATURE_30DEGC;
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if (get_option(&sysfan_control, "sysfan_cruise_control") != CB_SUCCESS)
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sysfan_control = FAN_CRUISE_CONTROL_DISABLED;
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if (get_option(&sysfan_speed, "sysfan_speed") != CB_SUCCESS)
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sysfan_speed = FAN_SPEED_5625;
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//if (get_option(&sysfan_temperature, "sysfan_temperature") != CB_SUCCESS)
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// sysfan_temperature = FAN_TEMPERATURE_30DEGC;
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// hwm_write(0x31, 0x20); // AVCC high limit
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// hwm_write(0x34, 0x06); // VIN2 low limit
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hwm_bank(0);
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hwm_write(0x59, 0x20); // Diode Selection
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hwm_write(0x5d, 0x0f); // All Sensors Diode, not Thermistor
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hwm_bank(4);
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hwm_write(0x54, 0xf1); // SYSTIN temperature offset
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hwm_write(0x55, 0x19); // CPUTIN temperature offset
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hwm_write(0x56, 0xfc); // AUXTIN temperature offset
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hwm_bank(0x80); // Default
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u8 fan_config = 0;
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// 00 FANOUT is Manual Mode
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// 01 FANOUT is Thermal Cruise Mode
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// 10 FANOUT is Fan Speed Cruise Mode
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switch (cpufan_control) {
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case FAN_CRUISE_CONTROL_SPEED: fan_config |= (2 << 4); break;
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case FAN_CRUISE_CONTROL_THERMAL: fan_config |= (1 << 4); break;
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}
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switch (sysfan_control) {
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case FAN_CRUISE_CONTROL_SPEED: fan_config |= (2 << 2); break;
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case FAN_CRUISE_CONTROL_THERMAL: fan_config |= (1 << 2); break;
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}
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// This register must be written first
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hwm_write(0x04, fan_config);
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switch (cpufan_control) {
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case FAN_CRUISE_CONTROL_SPEED:
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printk(BIOS_DEBUG, "Fan Cruise Control setting CPU fan to %d RPM\n",
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fan_speeds[cpufan_speed].fan_speed);
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hwm_write(0x06, fan_speeds[cpufan_speed].fan_in); // CPUFANIN target speed
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break;
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case FAN_CRUISE_CONTROL_THERMAL:
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printk(BIOS_DEBUG, "Fan Cruise Control setting CPU fan to activation at %d deg C/%d deg F\n",
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temperatures[cpufan_temperature].deg_celsius,
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temperatures[cpufan_temperature].deg_fahrenheit);
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hwm_write(0x06, temperatures[cpufan_temperature].deg_celsius); // CPUFANIN target temperature
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break;
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}
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switch (sysfan_control) {
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case FAN_CRUISE_CONTROL_SPEED:
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printk(BIOS_DEBUG, "Fan Cruise Control setting system fan to %d RPM\n",
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fan_speeds[sysfan_speed].fan_speed);
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hwm_write(0x05, fan_speeds[sysfan_speed].fan_in); // SYSFANIN target speed
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break;
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case FAN_CRUISE_CONTROL_THERMAL:
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printk(BIOS_DEBUG, "Fan Cruise Control setting system fan to activation at %d deg C/%d deg F\n",
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temperatures[sysfan_temperature].deg_celsius,
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temperatures[sysfan_temperature].deg_fahrenheit);
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hwm_write(0x05, temperatures[sysfan_temperature].deg_celsius); // SYSFANIN target temperature
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break;
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}
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hwm_write(0x0e, 0x02); // Fan Output Step Down Time
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hwm_write(0x0f, 0x02); // Fan Output Step Up Time
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hwm_write(0x47, 0xaf); // FAN divisor register
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hwm_write(0x4b, 0x84); // AUXFANIN speed divisor
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hwm_write(0x40, 0x01); // Init, but no SMI#
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}
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@ -0,0 +1,25 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
|
||||||
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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||||||
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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||||||
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* GNU General Public License for more details.
|
||||||
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*
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||||||
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* You should have received a copy of the GNU General Public License
|
||||||
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* along with this program; if not, write to the Free Software
|
||||||
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef SUPERIO_HWM_H
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#define SUPERIO_HWM_H
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void hwm_setup(void);
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|
|
||||||
|
#endif /* SUPERIO_HWM_H */
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Loading…
Reference in New Issue