nb/intel/ironlake: Reduce the scope of `heci_uma_addr`
There's no need to have it in raminfo. Also, bump MRC_CACHE_VERSION. Change-Id: Ida48ec4f50c880fe48d88d016acd3737a0650f80 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45364 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -61,7 +61,7 @@ typedef struct {
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u8 largest;
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} timing_bounds_t[2][2][2][9];
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#define MRC_CACHE_VERSION 2
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#define MRC_CACHE_VERSION 3
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struct ram_training {
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/* [TM][CHANNEL][SLOT][RANK][LANE] */
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@ -192,7 +192,6 @@ struct raminfo {
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unsigned int interleaved_part_mb;
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unsigned int non_interleaved_part_mb;
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u64 heci_uma_addr;
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unsigned int memory_reserved_for_heci_mb;
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struct ram_training training;
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@ -1764,7 +1763,7 @@ recv_heci_message(u32 *message, u32 *message_size)
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return -1;
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}
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static void send_heci_uma_message(struct raminfo *info)
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static void send_heci_uma_message(struct raminfo *info, const u64 heci_uma_addr)
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{
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volatile struct uma_reply {
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u8 group_id;
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@ -1790,7 +1789,7 @@ static void send_heci_uma_message(struct raminfo *info)
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} __packed msg = {
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0, MKHI_SET_UMA, 0, 0,
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0x82,
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info->heci_uma_addr, info->memory_reserved_for_heci_mb, 0};
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heci_uma_addr, info->memory_reserved_for_heci_mb, 0};
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u32 reply_size;
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send_heci_message((u8 *) & msg, sizeof(msg), 0, 7);
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@ -1805,11 +1804,10 @@ static void send_heci_uma_message(struct raminfo *info)
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static void setup_heci_uma(struct raminfo *info)
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{
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info->heci_uma_addr = 0;
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if (!info->memory_reserved_for_heci_mb && !(pci_read_config32(HECIDEV, 0x40) & 0x20))
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return;
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info->heci_uma_addr =
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const u64 heci_uma_addr =
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((u64)
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((((u64) pci_read_config16(NORTHBRIDGE, TOM)) << 6) -
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info->memory_reserved_for_heci_mb)) << 20;
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@ -1842,7 +1840,7 @@ static void setup_heci_uma(struct raminfo *info)
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MCHBAR32(0x24) = 0x10000 + info->memory_reserved_for_heci_mb;
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send_heci_uma_message(info);
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send_heci_uma_message(info, heci_uma_addr);
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pci_write_config32(HECIDEV, 0x10, 0x0);
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pci_write_config8(HECIDEV, 0x4, 0x0);
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