mb/intel/tglrvp/variants: Disable non-existing BT PCI interface and add BT flag
Remove the CNVi BT PCI config and add BT flag. There is no PCI host interface in this version of CNVi. TEST: BT is checked using 'lsusb -d 8087:0026' from OS to make sure BT is enumerated. Change-Id: I8de5615235f24e6169bf67dbbadb92e69437bc4e Signed-off-by: Cliff Huang <cliff.huang@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50899 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -19,6 +19,9 @@ chip soc/intel/tigerlake
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register "SaGv" = "SaGv_Enabled"
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register "SmbusEnable" = "1"
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# CNVi BT enable/disable
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register "CnviBtCore" = "true"
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register "usb2_ports[0]" = "USB2_PORT_MID(OC0)" # Type-C Port1
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register "usb2_ports[1]" = "USB2_PORT_EMPTY" # M.2 WWAN
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register "usb2_ports[2]" = "USB2_PORT_MID(OC3)" # M.2 Bluetooth
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@ -213,7 +216,6 @@ chip soc/intel/tigerlake
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device pci 0e.0 off end # VMD 0x9A0B
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# From PCH EDS(576591)
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device pci 10.2 on end # CNVi: BT 0xA0F5 - A0F7
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device pci 10.6 off end # THC0 0xA0D0
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device pci 10.7 off end # THC1 0xA0D1
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device pci 12.0 on # SensorHUB 0xA0FC
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@ -19,6 +19,9 @@ chip soc/intel/tigerlake
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register "SaGv" = "SaGv_Disabled"
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register "SmbusEnable" = "1"
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# CNVi BT enable/disable
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register "CnviBtCore" = "true"
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register "usb2_ports[0]" = "USB2_PORT_MID(OC3)" # Type-C Port1
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register "usb2_ports[1]" = "USB2_PORT_EMPTY" # M.2 WWAN
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register "usb2_ports[2]" = "USB2_PORT_MID(OC0)" # M.2 Bluetooth, USB3/2 Type A Port1
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@ -217,7 +220,6 @@ chip soc/intel/tigerlake
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device pci 0e.0 off end # VMD 0x9A0B
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# From PCH EDS(576591)
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device pci 10.2 on end # CNVi: BT 0xA0F5 - A0F7
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device pci 10.6 off end # THC0 0xA0D0
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device pci 10.7 off end # THC1 0xA0D1
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device pci 12.0 on # SensorHUB 0xA0FC
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