haswell boards: Use zero length for disabled USB ports

For disabled USB ports, the length setting does not matter. In future
commits, disabled USB ports will end up with length field set to zero.

Change-Id: I7613e1b0c89c0b58eca790ca14fcd1633c8a93af
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51450
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
This commit is contained in:
Angel Pons 2021-03-12 18:19:21 +01:00 committed by Patrick Georgi
parent c4ee714881
commit 36714d9fe6
2 changed files with 8 additions and 8 deletions

View File

@ -31,14 +31,14 @@ const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
{ 0x0040, 1, 1, USB_PORT_BACK_PANEL }, { 0x0040, 1, 1, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 2, USB_PORT_BACK_PANEL }, { 0x0040, 1, 2, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 2, USB_PORT_BACK_PANEL }, { 0x0040, 1, 2, USB_PORT_BACK_PANEL },
{ 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP }, { 0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
{ 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP }, { 0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
{ 0x0040, 1, 4, USB_PORT_BACK_PANEL }, { 0x0040, 1, 4, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 4, USB_PORT_BACK_PANEL }, { 0x0040, 1, 4, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 5, USB_PORT_BACK_PANEL }, { 0x0040, 1, 5, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 5, USB_PORT_BACK_PANEL }, { 0x0040, 1, 5, USB_PORT_BACK_PANEL },
{ 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP }, { 0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
{ 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP }, { 0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
}; };
const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = { const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {

View File

@ -33,12 +33,12 @@ const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
{ 0x0110, 1, 1, USB_PORT_BACK_PANEL }, { 0x0110, 1, 1, USB_PORT_BACK_PANEL },
{ 0x0110, 1, 2, USB_PORT_BACK_PANEL }, { 0x0110, 1, 2, USB_PORT_BACK_PANEL },
{ 0x0110, 1, 2, USB_PORT_BACK_PANEL }, { 0x0110, 1, 2, USB_PORT_BACK_PANEL },
{ 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP }, { 0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
{ 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP }, { 0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
{ 0x0040, 1, 4, USB_PORT_BACK_PANEL }, { 0x0040, 1, 4, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 4, USB_PORT_BACK_PANEL }, { 0x0040, 1, 4, USB_PORT_BACK_PANEL },
{ 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP }, { 0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
{ 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP }, { 0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
{ 0x0040, 1, 6, USB_PORT_BACK_PANEL }, { 0x0040, 1, 6, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 6, USB_PORT_BACK_PANEL }, { 0x0040, 1, 6, USB_PORT_BACK_PANEL },
}; };