haswell boards: Use zero length for disabled USB ports
For disabled USB ports, the length setting does not matter. In future commits, disabled USB ports will end up with length field set to zero. Change-Id: I7613e1b0c89c0b58eca790ca14fcd1633c8a93af Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51450 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
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@ -31,14 +31,14 @@ const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
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{ 0x0040, 1, 1, USB_PORT_BACK_PANEL },
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{ 0x0040, 1, 1, USB_PORT_BACK_PANEL },
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{ 0x0040, 1, 2, USB_PORT_BACK_PANEL },
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{ 0x0040, 1, 2, USB_PORT_BACK_PANEL },
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{ 0x0040, 1, 2, USB_PORT_BACK_PANEL },
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{ 0x0040, 1, 2, USB_PORT_BACK_PANEL },
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{ 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
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{ 0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
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{ 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
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{ 0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
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{ 0x0040, 1, 4, USB_PORT_BACK_PANEL },
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{ 0x0040, 1, 4, USB_PORT_BACK_PANEL },
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{ 0x0040, 1, 4, USB_PORT_BACK_PANEL },
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{ 0x0040, 1, 4, USB_PORT_BACK_PANEL },
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{ 0x0040, 1, 5, USB_PORT_BACK_PANEL },
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{ 0x0040, 1, 5, USB_PORT_BACK_PANEL },
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{ 0x0040, 1, 5, USB_PORT_BACK_PANEL },
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{ 0x0040, 1, 5, USB_PORT_BACK_PANEL },
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{ 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
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{ 0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
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{ 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
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{ 0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
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};
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};
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const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
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const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = {
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@ -33,12 +33,12 @@ const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = {
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{ 0x0110, 1, 1, USB_PORT_BACK_PANEL },
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{ 0x0110, 1, 1, USB_PORT_BACK_PANEL },
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{ 0x0110, 1, 2, USB_PORT_BACK_PANEL },
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{ 0x0110, 1, 2, USB_PORT_BACK_PANEL },
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{ 0x0110, 1, 2, USB_PORT_BACK_PANEL },
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{ 0x0110, 1, 2, USB_PORT_BACK_PANEL },
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{ 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
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{ 0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
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{ 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
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{ 0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
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{ 0x0040, 1, 4, USB_PORT_BACK_PANEL },
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{ 0x0040, 1, 4, USB_PORT_BACK_PANEL },
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{ 0x0040, 1, 4, USB_PORT_BACK_PANEL },
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{ 0x0040, 1, 4, USB_PORT_BACK_PANEL },
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{ 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
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{ 0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
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{ 0x0040, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
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{ 0x0000, 0, USB_OC_PIN_SKIP, USB_PORT_SKIP },
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{ 0x0040, 1, 6, USB_PORT_BACK_PANEL },
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{ 0x0040, 1, 6, USB_PORT_BACK_PANEL },
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{ 0x0040, 1, 6, USB_PORT_BACK_PANEL },
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{ 0x0040, 1, 6, USB_PORT_BACK_PANEL },
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};
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};
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