From 3679d7f90972d94858f27de122b66c9000e9e017 Mon Sep 17 00:00:00 2001 From: Timothy Pearson Date: Tue, 24 Nov 2015 14:11:57 -0600 Subject: [PATCH] mainboard/asus/kgpe-d16: Use W83667HG-A SuperIO instead of NCT5572D Change-Id: If67999098fbe2831eeb30cb8b362c558db5d2688 Signed-off-by: Timothy Pearson Reviewed-on: https://review.coreboot.org/13157 Reviewed-by: Martin Roth Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/mainboard/asus/kgpe-d16/Kconfig | 2 +- src/mainboard/asus/kgpe-d16/devicetree.cb | 42 ++++++++++++++--------- src/mainboard/asus/kgpe-d16/romstage.c | 8 ++--- 3 files changed, 30 insertions(+), 22 deletions(-) diff --git a/src/mainboard/asus/kgpe-d16/Kconfig b/src/mainboard/asus/kgpe-d16/Kconfig index f394ca9c7a..23c91f03eb 100644 --- a/src/mainboard/asus/kgpe-d16/Kconfig +++ b/src/mainboard/asus/kgpe-d16/Kconfig @@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SOUTHBRIDGE_AMD_SB700 select SOUTHBRIDGE_AMD_SB700_DISABLE_ISA_DMA select SOUTHBRIDGE_AMD_SUBTYPE_SP5100 - select SUPERIO_NUVOTON_NCT5572D + select SUPERIO_WINBOND_W83667HG_A select PARALLEL_CPU_INIT select HAVE_ROMSTAGE_CONSOLE_SPINLOCK select HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK diff --git a/src/mainboard/asus/kgpe-d16/devicetree.cb b/src/mainboard/asus/kgpe-d16/devicetree.cb index 96372f9650..2dde5636bb 100644 --- a/src/mainboard/asus/kgpe-d16/devicetree.cb +++ b/src/mainboard/asus/kgpe-d16/devicetree.cb @@ -177,34 +177,42 @@ chip northbridge/amd/amdfam10/root_complex # Root complex device pci 14.1 on end # IDE 0x439c device pci 14.2 on end # HDA 0x4383 (ASUS MIO add-on card) device pci 14.3 on # LPC 0x439d (SMBUS primary controller) - chip superio/nuvoton/nct5572d # Super I/O - device pnp 2e.0 off end # FDC; Not available on the KGPE-D16 - device pnp 2e.1 off end # LPT1; Not available on the KGPE-D16 - device pnp 2e.2 on # Com1 + chip superio/winbond/w83667hg-a # Super I/O + device pnp 2e.0 off end # FDC; Not available on the KGPE-D16 + device pnp 2e.1 off end # LPT1; Not available on the KGPE-D16 + device pnp 2e.2 on # COM1 io 0x60 = 0x3f8 irq 0x70 = 4 end - device pnp 2e.3 off end # IR: Not available on the KGPE-D16 - device pnp 2e.5 on # PS/2 keyboard & mouse + device pnp 2e.3 on # COM2 + io 0x60 = 0x2f8 + irq 0x70 = 3 + end + device pnp 2e.5 on # PS/2 keyboard & mouse io 0x60 = 0x60 io 0x62 = 0x64 irq 0x70 = 1 irq 0x72 = 12 end - device pnp 2e.6 off end # CIR: Not available on the KGPE-D16 - device pnp 2e.7 off end # GIPO689 - device pnp 2e.8 off end # WDT - device pnp 2e.9 off end # GPIO235 - device pnp 2e.a on end # ACPI - device pnp 2e.b on # HW Monitor + device pnp 2e.106 off end # SPI: Not available on the KGPE-D16 + device pnp 2e.107 off end # GIPO6 + device pnp 2e.207 off end # GIPO7 + device pnp 2e.307 off end # GIPO8 + device pnp 2e.407 off end # GIPO9 + device pnp 2e.8 off end # WDT + device pnp 2e.108 off end # GPIO 1 + device pnp 2e.9 off end # GPIO2 + device pnp 2e.109 off end # GPIO3 + device pnp 2e.209 off end # GPIO4 + device pnp 2e.309 off end # GPIO5 + device pnp 2e.a on end # ACPI + device pnp 2e.b on # HW Monitor io 0x60 = 0x290 - io 0x62 = 0x0000 # SB-TSI currently not implemented irq 0x70 = 5 end - device pnp 2e.c off end # PECI - device pnp 2e.d off end # SUSLED - device pnp 2e.e off end # CIRWKUP - device pnp 2e.f off end # GPIO_PP_OD + device pnp 2e.c off end # PECI + device pnp 2e.d off end # VID_BUSSEL + device pnp 2e.f off end # GPIO_PP_OD end end device pci 14.4 on # Bridge diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c index 13af96f98a..89183cc286 100644 --- a/src/mainboard/asus/kgpe-d16/romstage.c +++ b/src/mainboard/asus/kgpe-d16/romstage.c @@ -35,8 +35,8 @@ #include #include #include "northbridge/amd/amdfam10/reset_test.c" -#include -#include +#include +#include #include #include // #include "northbridge/amd/amdk8/incoherent_ht.c" @@ -46,7 +46,7 @@ #include "northbridge/amd/amdfam10/debug.c" #include "northbridge/amd/amdfam10/setup_resource_map.c" -#define SERIAL_DEV PNP_DEV(0x2e, NCT5572D_SP1) +#define SERIAL_DEV PNP_DEV(0x2e, W83667HG_A_SP1) static void activate_spd_rom(const struct mem_controller *ctrl); @@ -393,7 +393,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sb7xx_51xx_pci_port80(); /* Initialize early serial */ - nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); /* Disable LPC legacy DMA support to prevent lockup */