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soc/intel/elkhartlake: Update USB_PORT_MID pin settings 

Update Pre-emphasis, Transmitter Emphasis & Preemphasis Bias values
for USB_PORT_MID.

Signed-off-by: Tan, Lean Sheng <lean.sheng.tan@intel.com>
Change-Id: I43eeb0fc410197a559df97b340135fac65c00aa5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48541
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Tan, Lean Sheng 2020-12-10 09:55:15 -08:00 committed by Werner Zeh
parent 7d6df608ff
commit 36b45f6cef
1 changed files with 3 additions and 3 deletions
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6
src/soc/intel/elkhartlake/include/soc/usb.h
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@ -79,9 +79,9 @@ enum {
.enable = 1, \ .enable = 1, \
.ocpin = (pin), \ .ocpin = (pin), \
.tx_bias = USB2_BIAS_0MV, \ .tx_bias = USB2_BIAS_0MV, \
.tx_emp_enable = USB2_PRE_EMP_ON, \ .tx_emp_enable = USB2_DE_EMP_ON_PRE_EMP_ON, \
.pre_emp_bias = USB2_BIAS_56P3MV, \ .pre_emp_bias = USB2_BIAS_45MV, \
.pre_emp_bit = USB2_HALF_BIT_PRE_EMP, \ .pre_emp_bit = USB2_FULL_BIT_PRE_EMP, \
} }
/* Length = 3"-5.99" */ /* Length = 3"-5.99" */