k8: add CONFIG_K8_FORCE_2T_DRAM_TIMING and enable it for asus k8v-x
Change-Id: Ia457f92f6fb7e287defb838db07f12d0f1766757 Signed-off-by: Florian Zumbiehl <florz@florz.de> Reviewed-on: http://review.coreboot.org/481 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
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@ -15,6 +15,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select BOARD_ROMSIZE_KB_512
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select RAMINIT_SYSINFO
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select SET_FIDVID
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select K8_FORCE_2T_DRAM_TIMING
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config MAINBOARD_DIR
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string
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@ -37,6 +37,12 @@ config MEM_TRAIN_SEQ
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int
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default 0
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# Force 2T DRAM timing (vendor BIOS does it even for single DIMM setups and
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# single DIMM is indeed unreliable without it).
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config K8_FORCE_2T_DRAM_TIMING
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bool
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default n
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config HW_MEM_HOLE_SIZEK
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hex
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default 0x100000
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@ -1477,7 +1477,7 @@ hw_error:
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if (dloading != 0) {
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/* we have valid combination check the restrictions */
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dcl = pci_read_config32(ctrl->f2, DRAM_CONFIG_LOW);
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dcl |= (dimm_loading_config[dpos][rpos] & DDR_2T) ? (DCL_En2T) : 0;
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dcl |= ((dimm_loading_config[dpos][rpos] & DDR_2T) || CONFIG_K8_FORCE_2T_DRAM_TIMING) ? (DCL_En2T) : 0;
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/* Set DuallDimm is second channel is completely empty (revD+) */
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if (((cpuid_eax(1) & 0xfff0f) >= 0x10f00) && ((dpos & 0x5) == 0)) {
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printk(BIOS_DEBUG, "Setting DualDIMMen\n");
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@ -1661,7 +1661,7 @@ static struct spd_set_memclk_result spd_set_memclk(const struct mem_controller *
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goto hw_error;
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#if CONFIG_CPU_AMD_SOCKET_754
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if (freq < max_freq_1t) {
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if (freq < max_freq_1t || CONFIG_K8_FORCE_2T_DRAM_TIMING) {
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pci_write_config32(ctrl->f2, DRAM_CONFIG_LOW,
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pci_read_config32(ctrl->f2, DRAM_CONFIG_LOW) | DCL_En2T);
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}
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