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spi: Pass pointer to spi_slave structure in spi_setup_slave 

For spi_setup_slave, instead of making the platform driver return a
pointer to spi_slave structure, pass in a structure pointer that can be
filled in by the driver as required. This removes the need for platform
drivers to maintain a slave structure in data/CAR section.

BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully

Change-Id: Ia15a4f88ef4dcfdf616bb1c22261e7cb642a7573
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/17683
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Furquan Shaikh 2016-12-01 01:02:44 -08:00 committed by Furquan Shaikh
parent 0dba0254ea
commit 36b81af9e8
30 changed files with 201 additions and 235 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
src/drivers/spi/spi_flash.c
View File

@ -343,25 +343,24 @@ static struct spi_flash *__spi_flash_probe(struct spi_slave *spi)
struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs)
{
struct spi_slave *spi;
struct spi_slave spi;
struct spi_flash *flash;
spi = spi_setup_slave(bus, cs);
if (!spi) {
if (spi_setup_slave(bus, cs, &spi)) {
printk(BIOS_WARNING, "SF: Failed to set up slave\n");
return NULL;
}
/* Try special programmer probe if any (without force). */
flash = spi_flash_programmer_probe(spi, 0);
flash = spi_flash_programmer_probe(&spi, 0);
/* If flash is not found, try generic spi flash probe. */
if (!flash)
flash = __spi_flash_probe(spi);
flash = __spi_flash_probe(&spi);
/* If flash is not yet found, force special programmer probe if any. */
if (!flash)
flash = spi_flash_programmer_probe(spi, 1);
flash = spi_flash_programmer_probe(&spi, 1);
/* Give up -- nothing more to try if flash is not found. */
if (!flash) {

10
src/drivers/spi/tpm/tis.c
View File

@ -58,10 +58,16 @@ int tis_close(void)
int tis_init(void)
{
struct spi_slave spi;
struct tpm2_info info;
if (tpm2_init(spi_setup_slave(CONFIG_DRIVER_TPM_SPI_BUS,
CONFIG_DRIVER_TPM_SPI_CHIP))) {
if (spi_setup_slave(CONFIG_DRIVER_TPM_SPI_BUS,
CONFIG_DRIVER_TPM_SPI_CHIP, &spi)) {
printk(BIOS_ERR, "Failed to setup TPM SPI slave\n");
return -1;
}
if (tpm2_init(&spi)) {
printk(BIOS_ERR, "Failed to initialize TPM SPI interface\n");
return -1;
}

18
src/drivers/spi/tpm/tpm.c
View File

@ -36,7 +36,7 @@
/* SPI Interface descriptor used by the driver. */
struct tpm_spi_if {
struct spi_slave *slave;
struct spi_slave slave;
int (*cs_assert)(const struct spi_slave *slave);
void (*cs_deassert)(const struct spi_slave *slave);
int (*xfer)(const struct spi_slave *slave, const void *dout,
@ -130,7 +130,7 @@ static void start_transaction(int read_write, size_t bytes, unsigned addr)
header.body[i + 1] = (addr >> (8 * (2 - i))) & 0xff;
/* CS assert wakes up the slave. */
tpm_if.cs_assert(tpm_if.slave);
tpm_if.cs_assert(&tpm_if.slave);
/*
* The TCG TPM over SPI specification introduces the notion of SPI
@ -157,11 +157,11 @@ static void start_transaction(int read_write, size_t bytes, unsigned addr)
* to require to stall the master, this would present an issue.
* crosbug.com/p/52132 has been opened to track this.
*/
tpm_if.xfer(tpm_if.slave, header.body, sizeof(header.body), NULL, 0);
tpm_if.xfer(&tpm_if.slave, header.body, sizeof(header.body), NULL, 0);
/* Now poll the bus until TPM removes the stall bit. */
do {
tpm_if.xfer(tpm_if.slave, NULL, 0, &byte, 1);
tpm_if.xfer(&tpm_if.slave, NULL, 0, &byte, 1);
} while (!(byte & 1));
}
@ -227,7 +227,7 @@ static void trace_dump(const char *prefix, uint32_t reg,
*/
static void write_bytes(const void *buffer, size_t bytes)
{
tpm_if.xfer(tpm_if.slave, buffer, bytes, NULL, 0);
tpm_if.xfer(&tpm_if.slave, buffer, bytes, NULL, 0);
}
/*
@ -236,7 +236,7 @@ static void write_bytes(const void *buffer, size_t bytes)
*/
static void read_bytes(void *buffer, size_t bytes)
{
tpm_if.xfer(tpm_if.slave, NULL, 0, buffer, bytes);
tpm_if.xfer(&tpm_if.slave, NULL, 0, buffer, bytes);
}
/*
@ -251,7 +251,7 @@ static int tpm2_write_reg(unsigned reg_number, const void *buffer, size_t bytes)
trace_dump("W", reg_number, bytes, buffer, 0);
start_transaction(false, bytes, reg_number);
write_bytes(buffer, bytes);
tpm_if.cs_deassert(tpm_if.slave);
tpm_if.cs_deassert(&tpm_if.slave);
return 1;
}
@ -266,7 +266,7 @@ static int tpm2_read_reg(unsigned reg_number, void *buffer, size_t bytes)
{
start_transaction(true, bytes, reg_number);
read_bytes(buffer, bytes);
tpm_if.cs_deassert(tpm_if.slave);
tpm_if.cs_deassert(&tpm_if.slave);
trace_dump("R", reg_number, bytes, buffer, 0);
return 1;
}
@ -303,7 +303,7 @@ int tpm2_init(struct spi_slave *spi_if)
uint32_t did_vid, status;
uint8_t cmd;
tpm_if.slave = spi_if;
memcpy(&tpm_if.slave, spi_if, sizeof(*spi_if));
tpm2_read_reg(TPM_DID_VID_REG, &did_vid, sizeof(did_vid));

14
src/ec/google/chromeec/ec_spi.c
View File

@ -101,13 +101,17 @@ out:
int google_chromeec_command(struct chromeec_command *cec_command)
{
static struct spi_slave *slave = NULL;
if (!slave) {
slave = spi_setup_slave(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS,
CONFIG_EC_GOOGLE_CHROMEEC_SPI_CHIP);
static int done = 0;
static struct spi_slave slave;
if (!done) {
if (spi_setup_slave(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS,
CONFIG_EC_GOOGLE_CHROMEEC_SPI_CHIP, &slave))
return -1;
stopwatch_init(&cs_cooldown_sw);
done = 1;
}
return crosec_command_proto(cec_command, crosec_spi_io, slave);
return crosec_command_proto(cec_command, crosec_spi_io, &slave);
}
#ifndef __PRE_RAM__

7
src/include/spi-generic.h
View File

@ -48,11 +48,12 @@ void spi_init(void);
*
* bus: Bus ID of the slave chip.
* cs: Chip select ID of the slave chip on the specified bus.
* slave: Pointer to slave structure that needs to be initialized.
*
* Returns: A spi_slave reference that can be used in subsequent SPI
* calls, or NULL if one or more of the parameters are not supported.
* Returns:
* 0 on success, -1 on error
*/
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs);
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave);
/*-----------------------------------------------------------------------
* Claim the bus and prepare it for communication with a given slave.

18
src/soc/broadcom/cygnus/spi.c
View File

@ -76,9 +76,6 @@
/* QSPI private data */
struct qspi_priv {
/* Slave entry */
struct spi_slave slave;
/* Specified SPI parameters */
unsigned int max_hz;
unsigned int spi_mode;
@ -94,16 +91,19 @@ struct qspi_priv {
static struct qspi_priv qspi_slave;
/* Macro to get the private data */
#define to_qspi_slave(s) container_of(s, struct qspi_priv, slave)
static struct qspi_priv *to_qspi_slave(const struct spi_slave *slave)
{
return &qspi_slave;
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
struct qspi_priv *priv = &qspi_slave;
unsigned int spbr;
priv->slave.bus = bus;
priv->slave.cs = cs;
slave->bus = bus;
slave->cs = cs;
priv->max_hz = QSPI_MAX_HZ;
priv->spi_mode = QSPI_MODE;
priv->reg = (void *)(IPROC_QSPI_BASE);
@ -129,7 +129,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
(8 << 2) | /* 8 bits per word */
(priv->spi_mode & 3)); /* mode: CPOL / CPHA */
return &priv->slave;
return 0;
}
static int mspi_enable(struct qspi_priv *priv)

46
src/soc/imgtec/pistachio/spi.c
View File

@ -30,7 +30,6 @@
#define IMGTEC_SPI_MAX_TRANSFER_SIZE ((1 << 16) - 1)
struct img_spi_slave {
struct spi_slave slave;
/* SPIM instance device parameters */
struct spim_device_parameters device_parameters;
/* SPIM instance base address */
@ -59,13 +58,20 @@ static int wait_status(u32 reg, u32 shift)
return SPIM_OK;
}
static struct img_spi_slave *get_img_slave(const struct spi_slave *slave)
{
return img_spi_slaves + slave->bus * SPIM_NUM_PORTS_PER_BLOCK +
slave->cs;
}
/* Transmitter function. Fills TX FIFO with data before enabling SPIM */
static int transmitdata(const struct spi_slave *slave, u8 *buffer, u32 size)
{
u32 blocksize, base, write_data;
int ret;
struct img_spi_slave *img_slave = get_img_slave(slave);
base = container_of(slave, struct img_spi_slave, slave)->base;
base = img_slave->base;
while (size) {
/* Wait until FIFO empty */
write32(base + SPFI_INT_CLEAR_REG_OFFSET, SPFI_SDE_MASK);
@ -101,8 +107,9 @@ static int receivedata(const struct spi_slave *slave, u8 *buffer, u32 size)
{
u32 read_data, base;
int ret;
struct img_spi_slave *img_slave = get_img_slave(slave);
base = container_of(slave, struct img_spi_slave, slave)->base;
base = img_slave->base;
/*
* Do 32bit reads first. Clear status GDEX32BIT here so that the first
* status reg. read gets the actual bit state
@ -145,10 +152,10 @@ static void setparams(const struct spi_slave *slave, u32 port,
struct spim_device_parameters *params)
{
u32 spim_parameters, port_state, base;
struct img_spi_slave *img_slave = get_img_slave(slave);
base = img_slave->base;
spim_parameters = 0;
base = container_of(slave, struct img_spi_slave, slave)->base;
port_state = read32(base + SPFI_PORT_STATE_REG_OFFSET);
port_state &= ~((SPIM_PORT0_MASK>>port)|SPFI_PORT_SELECT_MASK);
port_state |= params->cs_idle_level<<(SPIM_CS0_IDLE_SHIFT-port);
@ -250,7 +257,9 @@ static u32 control_reg_setup(struct spim_buffer *first,
static int check_buffers(const struct spi_slave *slave, struct spim_buffer *first,
struct spim_buffer *second){
if (!(container_of(slave, struct img_spi_slave, slave)->initialised))
struct img_spi_slave *img_slave = get_img_slave(slave);
if (!(img_slave->initialised))
return -SPIM_API_NOT_INITIALISED;
/*
* First operation must always be defined
@ -331,8 +340,9 @@ static int spim_io(const struct spi_slave *slave, struct spim_buffer *first,
u32 reg, base;
int i, trans_count, ret;
struct spim_buffer *transaction[2];
struct img_spi_slave *img_slave = get_img_slave(slave);
base = container_of(slave, struct img_spi_slave, slave)->base;
base = img_slave->base;
ret = check_buffers(slave, first, second);
if (ret)
@ -412,11 +422,9 @@ void spi_init(void)
}
/* Set up communications parameters for a SPI slave. */
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
struct img_spi_slave *img_slave = NULL;
struct spi_slave *slave;
struct spim_device_parameters *device_parameters;
u32 base;
@ -430,21 +438,21 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
default:
printk(BIOS_ERR, "%s: Error: unsupported bus.\n",
__func__);
return NULL;
return -1;
}
if (cs > SPIM_DEVICE4) {
printk(BIOS_ERR, "%s: Error: unsupported chipselect.\n",
__func__);
return NULL;
return -1;
}
img_slave = img_spi_slaves + bus * SPIM_NUM_PORTS_PER_BLOCK + cs;
slave = &(img_slave->slave);
slave->bus = bus;
slave->cs = cs;
img_slave = get_img_slave(slave);
device_parameters = &(img_slave->device_parameters);
img_slave->base = base;
slave->bus = bus;
slave->cs = cs;
device_parameters->bitrate = 64;
device_parameters->cs_setup = 0;
@ -455,7 +463,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
device_parameters->data_idle_level = 0;
img_slave->initialised = IMG_FALSE;
return slave;
return 0;
}
/* Claim the bus and prepare it for communication */
@ -469,7 +477,7 @@ int spi_claim_bus(const struct spi_slave *slave)
__func__);
return -SPIM_API_NOT_INITIALISED;
}
img_slave = container_of(slave, struct img_spi_slave, slave);
img_slave = get_img_slave(slave);
if (img_slave->initialised)
return SPIM_OK;
/* Check device parameters */
@ -499,7 +507,7 @@ void spi_release_bus(const struct spi_slave *slave)
__func__);
return;
}
img_slave = container_of(slave, struct img_spi_slave, slave);
img_slave = get_img_slave(slave);
img_slave->initialised = IMG_FALSE;
/* Soft reset peripheral internals */
write32(img_slave->base + SPFI_CONTROL_REG_OFFSET,

9
src/soc/intel/apollolake/spi.c
View File

@ -344,7 +344,6 @@ static int nuclear_spi_status(const struct spi_flash *flash, uint8_t *reg)
return ret;
}
static struct spi_slave boot_spi CAR_GLOBAL;
static struct spi_flash boot_flash CAR_GLOBAL;
/*
@ -391,20 +390,18 @@ struct spi_flash *spi_flash_programmer_probe(struct spi_slave *spi, int force)
return flash;
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
BOILERPLATE_CREATE_CTX(ctx);
/* This is special hardware. We expect bus 0 and CS line 0 here. */
if ((bus != 0) || (cs != 0))
return NULL;
struct spi_slave *slave = car_get_var_ptr(&boot_spi);
return -1;
slave->bus = bus;
slave->cs = cs;
return slave;
return 0;
}
int spi_read_status(uint8_t *status)

13
src/soc/intel/baytrail/spi.c
View File

@ -260,20 +260,11 @@ static void ich_set_bbar(uint32_t minaddr)
writel_(ichspi_bbar, cntlr.bbar);
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
ich_spi_slave *slave = malloc(sizeof(*slave));
if (!slave) {
printk(BIOS_DEBUG, "ICH SPI: Bad allocation\n");
return NULL;
}
memset(slave, 0, sizeof(*slave));
slave->bus = bus;
slave->cs = cs;
return slave;
return 0;
}
static ich9_spi_regs *spi_regs(void)

13
src/soc/intel/braswell/spi.c
View File

@ -229,20 +229,11 @@ static void read_reg(void *src, void *value, uint32_t size)
}
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
ich_spi_slave *slave = malloc(sizeof(*slave));
if (!slave) {
printk(BIOS_ERR, "ICH SPI: Bad allocation\n");
return NULL;
}
memset(slave, 0, sizeof(*slave));
slave->bus = bus;
slave->cs = cs;
return slave;
return 0;
}
static ich9_spi_regs *spi_regs(void)

13
src/soc/intel/broadwell/spi.c
View File

@ -259,20 +259,11 @@ static void ich_set_bbar(uint32_t minaddr)
writel_(ichspi_bbar, cntlr.bbar);
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
ich_spi_slave *slave = malloc(sizeof(*slave));
if (!slave) {
printk(BIOS_DEBUG, "ICH SPI: Bad allocation\n");
return NULL;
}
memset(slave, 0, sizeof(*slave));
slave->bus = bus;
slave->cs = cs;
return slave;
return 0;
}
void spi_init(void)

13
src/soc/intel/fsp_baytrail/spi.c
View File

@ -249,20 +249,11 @@ static void read_reg(const void *src, void *value, uint32_t size)
}
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
ich_spi_slave *slave = malloc(sizeof(*slave));
if (!slave) {
printk(BIOS_DEBUG, "ICH SPI: Bad allocation\n");
return NULL;
}
memset(slave, 0, sizeof(*slave));
slave->bus = bus;
slave->cs = cs;
return slave;
return 0;
}
static ich9_spi_regs *spi_regs(void)

13
src/soc/intel/fsp_broadwell_de/spi.c
View File

@ -259,20 +259,11 @@ static void ich_set_bbar(uint32_t minaddr)
writel_(ichspi_bbar, cntlr.bbar);
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave * slave)
{
ich_spi_slave *slave = malloc(sizeof(*slave));
if (!slave) {
printk(BIOS_DEBUG, "ICH SPI: Bad allocation\n");
return NULL;
}
memset(slave, 0, sizeof(*slave));
slave->bus = bus;
slave->cs = cs;
return slave;
return 0;
}
void spi_init(void)

9
src/soc/intel/skylake/flash_controller.c
View File

@ -342,7 +342,6 @@ int pch_hwseq_read_status(const struct spi_flash *flash, u8 *reg)
return 0;
}
static struct spi_slave boot_spi CAR_GLOBAL;
static struct spi_flash boot_flash CAR_GLOBAL;
struct spi_flash *spi_flash_programmer_probe(struct spi_slave *spi, int force)
@ -370,18 +369,16 @@ struct spi_flash *spi_flash_programmer_probe(struct spi_slave *spi, int force)
return flash;
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
/* This is special hardware. We expect bus 0 and CS line 0 here. */
if ((bus != 0) || (cs != 0))
return NULL;
struct spi_slave *slave = car_get_var_ptr(&boot_spi);
return -1;
slave->bus = bus;
slave->cs = cs;
return slave;
return 0;
}
int spi_flash_get_fpr_info(struct fpr_info *info)

8
src/soc/marvell/armada38x/spi.c
View File

@ -153,8 +153,6 @@ static MV_SPI_TYPE_INFO spi_types[] = { {.en16_bit = MV_TRUE,
param define end
*******************************************************************************/
static struct spi_slave s_spi;
static int mv_spi_baud_rate_set(unsigned char spi_id,
unsigned int serial_baud_rate);
static void mv_spi_cs_deassert(unsigned char spi_id);
@ -444,14 +442,12 @@ static int mrvl_spi_xfer(const struct spi_slave *slave,
return 0;
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
struct spi_slave *slave = &s_spi;
slave->bus = bus;
slave->cs = cs;
mv_spi_sys_init(bus, cs, CONFIG_SF_DEFAULT_SPEED);
return slave;
return 0;
}
int spi_claim_bus(const struct spi_slave *slave)

4
src/soc/marvell/bg4cd/spi.c
View File

@ -15,9 +15,9 @@
#include <stddef.h>
#include <spi-generic.h>
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
return NULL;
return -1;
}
int spi_claim_bus(const struct spi_slave *slave)

22
src/soc/mediatek/mt8173/spi.c
View File

@ -47,9 +47,6 @@ enum {
static struct mtk_spi_bus spi_bus[1] = {
{
.slave = {
.bus = 0,
},
.regs = (void *)SPI_BASE,
.state = MTK_SPI_IDLE,
}
@ -57,7 +54,8 @@ static struct mtk_spi_bus spi_bus[1] = {
static inline struct mtk_spi_bus *to_mtk_spi(const struct spi_slave *slave)
{
return container_of(slave, struct mtk_spi_bus, slave);
assert(slave->bus < ARRAY_SIZE(spi_bus));
return &spi_bus[slave->bus];
}
static void spi_sw_reset(struct mtk_spi_regs *regs)
@ -162,24 +160,26 @@ static void mtk_spi_dump_data(const char *name, const uint8_t *data,
#endif
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
struct mtk_spi_bus *eslave;
static struct spi_slave slave;
switch (bus) {
case CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS:
eslave = &spi_bus[bus];
slave->bus = bus;
slave->cs = cs;
eslave = to_mtk_spi(slave);
assert(read32(&eslave->regs->spi_cfg0_reg) != 0);
spi_sw_reset(eslave->regs);
return &eslave->slave;
return 0;
case CONFIG_BOOT_DEVICE_SPI_FLASH_BUS:
slave.bus = bus;
slave.cs = cs;
return &slave;
slave->bus = bus;
slave->cs = cs;
return 0;
default:
die ("wrong bus number.\n");
};
return -1;
}
int spi_claim_bus(const struct spi_slave *slave)

9
src/soc/nvidia/tegra124/spi.c
View File

@ -798,11 +798,14 @@ int spi_xfer(const struct spi_slave *slave, const void *dout,
return ret;
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
struct tegra_spi_channel *channel = to_tegra_spi(bus);
if (!channel)
return NULL;
return -1;
return &channel->slave;
slave->bus = channel->slave.bus;
slave->cs = channel->slave.cs;
return 0;
}

9
src/soc/nvidia/tegra210/spi.c
View File

@ -834,11 +834,14 @@ int spi_xfer(const struct spi_slave *slave, const void *dout,
return ret;
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
struct tegra_spi_channel *channel = to_tegra_spi(bus);
if (!channel)
return NULL;
return -1;
return &channel->slave;
slave->cs = channel->slave.cs;
slave->bus = channel->slave.bus;
return 0;
}

5
src/soc/qualcomm/ipq40xx/include/soc/spi.h
View File

@ -186,9 +186,4 @@ struct ipq_spi_slave {
int allocated;
};
static inline struct ipq_spi_slave *to_ipq_spi(const struct spi_slave *slave)
{
return container_of(slave, struct ipq_spi_slave, slave);
}
#endif /* _IPQ40XX_SPI_H_ */

34
src/soc/qualcomm/ipq40xx/spi.c
View File

@ -207,7 +207,26 @@ void spi_init(void)
memset(spi_slave_pool, 0, sizeof(spi_slave_pool));
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
static struct ipq_spi_slave *to_ipq_spi(const struct spi_slave *slave)
{
struct ipq_spi_slave *ds;
size_t i;
for (i = 0; i < ARRAY_SIZE(spi_slave_pool); i++) {
ds = spi_slave_pool + i;
if (!ds->allocated)
continue;
if ((ds->slave.bus == slave->bus) &&
(ds->slave.cs == slave->cs))
return ds;
}
return NULL;
}
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
struct ipq_spi_slave *ds = NULL;
int i;
@ -218,16 +237,17 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
printk(BIOS_ERR,
"SPI error: unsupported bus %d (Supported busses 0, 1 and 2) "
"or chipselect\n", bus);
return NULL;
return -1;
}
for (i = 0; i < ARRAY_SIZE(spi_slave_pool); i++) {
if (spi_slave_pool[i].allocated)
continue;
ds = spi_slave_pool + i;
ds->slave.bus = bus;
ds->slave.cs = cs;
ds->regs = &spi_reg[bus];
ds->slave.bus = slave->bus = bus;
ds->slave.cs = slave->cs = cs;
ds->regs = &spi_reg[bus];
/*
* TODO(vbendeb):
@ -238,11 +258,11 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
ds->mode = SPI_MODE3;
ds->allocated = 1;
return &ds->slave;
return 0;
}
printk(BIOS_ERR, "SPI error: all %d pools busy\n", i);
return NULL;
return -1;
}
/*

5
src/soc/qualcomm/ipq806x/include/soc/spi.h
View File

@ -271,9 +271,4 @@ struct ipq_spi_slave {
int allocated;
};
static inline struct ipq_spi_slave *to_ipq_spi(const struct spi_slave *slave)
{
return container_of(slave, struct ipq_spi_slave, slave);
}
#endif /* _IPQ806X_SPI_H_ */

32
src/soc/qualcomm/ipq806x/spi.c
View File

@ -499,7 +499,26 @@ void spi_init()
memset(spi_slave_pool, 0, sizeof(spi_slave_pool));
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
static struct ipq_spi_slave *to_ipq_spi(const struct spi_slave *slave)
{
struct ipq_spi_slave *ds;
size_t i;
for (i = 0; i < ARRAY_SIZE(spi_slave_pool); i++) {
ds = spi_slave_pool + i;
if (!ds->allocated)
continue;
if ((ds->slave.bus == slave->bus) &&
(ds->slave.cs == slave->cs))
return ds;
}
return NULL;
}
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
struct ipq_spi_slave *ds = NULL;
int i;
@ -521,9 +540,10 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
if (spi_slave_pool[i].allocated)
continue;
ds = spi_slave_pool + i;
ds->slave.bus = bus;
ds->slave.cs = cs;
ds->regs = &spi_reg[bus];
ds->slave.bus = slave->bus = bus;
ds->slave.cs = slave->cs = cs;
ds->regs = &spi_reg[bus];
/*
* TODO(vbendeb):
@ -534,11 +554,11 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
ds->mode = GSBI_SPI_MODE_0;
ds->allocated = 1;
return &ds->slave;
return 0;
}
printk(BIOS_ERR, "SPI error: all %d pools busy\n", i);
return NULL;
return -1;
}
/*

20
src/soc/rockchip/common/spi.c
View File

@ -27,7 +27,6 @@
#include <timer.h>
struct rockchip_spi_slave {
struct spi_slave slave;
struct rockchip_spi *regs;
};
@ -37,30 +36,24 @@ struct rockchip_spi_slave {
static struct rockchip_spi_slave rockchip_spi_slaves[] = {
{
.slave = { .bus = 0, },
.regs = (void *)SPI0_BASE,
},
{
.slave = { .bus = 1, },
.regs = (void *)SPI1_BASE,
},
{
.slave = { .bus = 2, },
.regs = (void *)SPI2_BASE,
},
#ifdef SPI3_BASE
{
.slave = { .bus = 3, },
.regs = (void *)SPI3_BASE,
},
#ifdef SPI4_BASE
{
.slave = { .bus = 4, },
.regs = (void *)SPI4_BASE,
},
#ifdef SPI5_BASE
{
.slave = { .bus = 5, },
.regs = (void *)SPI5_BASE,
},
#endif
@ -70,13 +63,18 @@ static struct rockchip_spi_slave rockchip_spi_slaves[] = {
static struct rockchip_spi_slave *to_rockchip_spi(const struct spi_slave *slave)
{
return container_of(slave, struct rockchip_spi_slave, slave);
assert(slave->bus < ARRAY_SIZE(rockchip_spi_slaves));
return &rockchip_spi_slaves[slave->bus];
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
assert(bus >= 0 && bus < ARRAY_SIZE(rockchip_spi_slaves));
return &(rockchip_spi_slaves[bus].slave);
assert(bus < ARRAY_SIZE(rockchip_spi_slaves));
slave->bus = bus;
slave->cs = cs;
return 0;
}
static void spi_cs_activate(const struct spi_slave *slave)

13
src/soc/samsung/exynos5420/spi.c
View File

@ -60,7 +60,7 @@ static struct exynos_spi_slave exynos_spi_slaves[3] = {
static inline struct exynos_spi_slave *to_exynos_spi(const struct spi_slave *slave)
{
return container_of(slave, struct exynos_spi_slave, slave);
return &exynos_spi_slaves[slave->bus];
}
static void spi_sw_reset(struct exynos_spi *regs, int word)
@ -117,15 +117,20 @@ static void exynos_spi_init(struct exynos_spi *regs)
spi_sw_reset(regs, 1);
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
ASSERT(bus >= 0 && bus < 3);
struct exynos_spi_slave *eslave = &exynos_spi_slaves[bus];
struct exynos_spi_slave *eslave;
slave->bus = bus;
slave->cs = cs;
eslave = to_exynos_spi(slave);
if (!eslave->initialized) {
exynos_spi_init(eslave->regs);
eslave->initialized = 1;
}
return &eslave->slave;
return 0;
}
int spi_claim_bus(const struct spi_slave *slave)

14
src/southbridge/amd/agesa/hudson/spi.c
View File

@ -176,15 +176,9 @@ int chipset_volatile_group_end(const struct spi_flash *flash)
return 0;
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
struct spi_slave *slave = malloc(sizeof(*slave));
if (!slave) {
return NULL;
}
memset(slave, 0, sizeof(*slave));
return slave;
slave->bus = bus;
slave->cs = cs;
return 0;
}

14
src/southbridge/amd/cimx/sb800/spi.c
View File

@ -168,15 +168,9 @@ int chipset_volatile_group_end(const struct spi_flash *flash)
return 0;
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
struct spi_slave *slave = malloc(sizeof(*slave));
if (!slave) {
return NULL;
}
memset(slave, 0, sizeof(*slave));
return slave;
slave->bus = bus;
slave->cs = cs;
return 0;
}

14
src/southbridge/amd/sb700/spi.c
View File

@ -76,17 +76,11 @@ void spi_release_bus(const struct spi_slave *slave)
/* Handled internally by the SB700 */
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
struct spi_slave *slave = malloc(sizeof(*slave));
if (!slave) {
return NULL;
}
memset(slave, 0, sizeof(*slave));
return slave;
slave->bus = bus;
slave->cs = cs;
return 0;
}
int spi_xfer(const struct spi_slave *slave, const void *dout,

13
src/southbridge/intel/common/spi.c
View File

@ -285,20 +285,11 @@ static void ich_set_bbar(uint32_t minaddr)
writel_(ichspi_bbar, cntlr.bbar);
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
ich_spi_slave *slave = malloc(sizeof(*slave));
if (!slave) {
printk(BIOS_DEBUG, "ICH SPI: Bad allocation\n");
return NULL;
}
memset(slave, 0, sizeof(*slave));
slave->bus = bus;
slave->cs = cs;
return slave;
return 0;
}
void spi_init(void)

13
src/southbridge/intel/fsp_rangeley/spi.c
View File

@ -322,20 +322,11 @@ static void ich_set_bbar(uint32_t minaddr)
writel_(ichspi_bbar, cntlr.bbar);
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
{
ich_spi_slave *slave = malloc(sizeof(*slave));
if (!slave) {
printk(BIOS_DEBUG, "ICH SPI: Bad allocation\n");
return NULL;
}
memset(slave, 0, sizeof(*slave));
slave->bus = bus;
slave->cs = cs;
return slave;
return 0;
}
/*