fix adjustment for sizeram
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2259 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -14,6 +14,11 @@
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#include <cpu/x86/cache.h>
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#include <cpu/x86/cache.h>
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#define NORTHBRIDGE_FILE "northbridge.c"
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#define NORTHBRIDGE_FILE "northbridge.c"
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/* number of MB to take off the top of ram for VSM and display memory.
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* FIXME -- make this configurable
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*/
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#define RAMADJUSTMB 9
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/*
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/*
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*/
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*/
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@ -139,7 +144,7 @@ setup_gx2_cache(void)
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val |= ((unsigned long long) DEVICE_PROPERTIES) << 28;
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val |= ((unsigned long long) DEVICE_PROPERTIES) << 28;
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/* sigh. Take our TOM, RIGHT shift 12, since it page-aligned, then LEFT-shift 8 for reg. */
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/* sigh. Take our TOM, RIGHT shift 12, since it page-aligned, then LEFT-shift 8 for reg. */
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/* yank off 8M for frame buffer and 1M for VSA */
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/* yank off 8M for frame buffer and 1M for VSA */
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sizembytes -= 9;
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sizembytes -= RAMADJUSTMB;
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sizereg = sizembytes;
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sizereg = sizembytes;
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sizereg *= 0x100000;
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sizereg *= 0x100000;
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sizereg >>= 12;
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sizereg >>= 12;
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@ -434,7 +439,7 @@ static void enable_dev(struct device *dev)
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do_vsmbios();
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do_vsmbios();
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dev->ops = &pci_domain_ops;
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dev->ops = &pci_domain_ops;
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pci_set_method(dev);
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pci_set_method(dev);
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ram_resource(dev, 0, 0, sizeram()*1024);
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ram_resource(dev, 0, 0, (sizeram() - RAMADJUSTMB)*1024);
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} else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
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} else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
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printk_debug("DEVICE_PATH_APIC_CLUSTER\n");
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printk_debug("DEVICE_PATH_APIC_CLUSTER\n");
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