superio/smsc/lpc47n2{17,27}: Fix typo

Change-Id: I29a42908af5699200216b7a0082e1417c90c95a6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37510
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Elyes HAOUAS 2019-12-05 11:05:19 +01:00 committed by Felix Held
parent b21999cbed
commit 36c6f95602
2 changed files with 2 additions and 2 deletions

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@ -69,7 +69,7 @@ static void lpc47n217_pnp_set_iobase(pnp_devfn_t dev, u16 iobase)
* true base port is programmed (see lpc47n217_enable_serial() below). * true base port is programmed (see lpc47n217_enable_serial() below).
* *
* @param dev High 8 bits = Super I/O port, low 8 bits = logical device number. * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
* @param enable 0 to disable, anythig else to enable. * @param enable 0 to disable, anything else to enable.
*/ */
static void lpc47n217_pnp_set_enable(pnp_devfn_t dev, int enable) static void lpc47n217_pnp_set_enable(pnp_devfn_t dev, int enable)
{ {

View File

@ -73,7 +73,7 @@ static void lpc47n227_pnp_set_iobase(pnp_devfn_t dev, u16 iobase)
* true base port is programmed (see lpc47n227_enable_serial() below). * true base port is programmed (see lpc47n227_enable_serial() below).
* *
* @param dev High 8 bits = Super I/O port, low 8 bits = logical device number. * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
* @param enable 0 to disable, anythig else to enable. * @param enable 0 to disable, anything else to enable.
*/ */
static void lpc47n227_pnp_set_enable(pnp_devfn_t dev, int enable) static void lpc47n227_pnp_set_enable(pnp_devfn_t dev, int enable)
{ {