arm64: Allow cpu specific early setup
Call arm64_cpu_early_setup to allow cpu-specific initialization to be performed. Also, add support for setting SMPEN bit for cortex a57 within arm64_cpu_early_setup. BUG=chrome-os-partner:38222 BRANCH=None TEST=Compiles successfully and SMP works for foster Change-Id: Ifa4e6134dbce3ad63046b3dd9b947c3d9134d5e7 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: fe0eac5f416efcf9f7b05388a17444205a8352c0 Original-Change-Id: I28a05a20e6adf084cd0bf94bdd0c3b492632107c Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/262993 Original-Trybot-Ready: Furquan Shaikh <furquan@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/9977 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
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@ -30,6 +30,7 @@ config ARCH_SPINTABLE
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depends on ARCH_RAMSTAGE_ARM64
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source src/arch/arm64/armv8/Kconfig
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source src/arch/arm64/cpu/Kconfig
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# If a custom bootblock is necessary, this option should be "select"-ed by
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# the thing that needs it, probably the CPU.
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@ -27,7 +27,7 @@
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# Take care of subdirectories
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################################################################################
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subdirs-y += armv8/
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subdirs-y += armv8/ cpu/
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################################################################################
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# ARM specific options
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@ -60,6 +60,7 @@ $(obj)/arch/arm64/id.bootblock.o: $(obj)/build.h
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bootblock-y += boot.c
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bootblock-y += c_entry.c
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bootblock-y += stage_entry.S
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bootblock-y += cpu-stubs.c
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bootblock-y += stages.c
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bootblock-y += eabi_compat.c
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bootblock-y += transition.c transition_asm.S
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@ -107,6 +108,7 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM64),y)
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romstage-y += boot.c
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romstage-y += c_entry.c
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romstage-y += stage_entry.S
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romstage-y += cpu-stubs.c
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romstage-y += stages.c
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romstage-y += div0.c
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romstage-y += eabi_compat.c
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@ -149,6 +151,7 @@ ramstage-y += ../../lib/memset.c
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ramstage-y += ../../lib/memcpy.c
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ramstage-y += ../../lib/memmove.c
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ramstage-y += stage_entry.S
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ramstage-y += cpu-stubs.c
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ramstage-$(CONFIG_ARCH_SPINTABLE) += spintable.c spintable_asm.S
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ramstage-y += transition.c transition_asm.S
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@ -158,6 +161,7 @@ rmodules_arm64-y += ../../lib/memmove.c
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rmodules_arm64-y += eabi_compat.c
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secmon-$(CONFIG_ARCH_USE_SECURE_MONITOR) += stage_entry.S
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secmon-$(CONFIG_ARCH_USE_SECURE_MONITOR) += cpu-stubs.c
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secmon-$(CONFIG_ARCH_USE_SECURE_MONITOR) += startup.c
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secmon-$(CONFIG_ARCH_USE_SECURE_MONITOR) += ../../lib/malloc.c
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secmon-$(CONFIG_ARCH_USE_SECURE_MONITOR) += ../../lib/memset.c
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@ -0,0 +1,25 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2015 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
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*/
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void arm64_cpu_early_setup(void);
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void __attribute__((weak)) arm64_cpu_early_setup(void)
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{
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/* Default empty implementation */
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}
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@ -0,0 +1,23 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2015 Google Inc
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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config ARCH_ARM64_CPU_CORTEX_A57
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bool
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default n
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depends on ARCH_ARM64
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@ -0,0 +1,24 @@
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################################################################################
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##
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## This file is part of the coreboot project.
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##
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## Copyright 2015 Google Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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################################################################################
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ifeq ($(CONFIG_ARCH_RAMSTAGE_ARM64),y)
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ramstage-$(CONFIG_ARCH_ARM64_CPU_CORTEX_A57) += cortex_a57.S
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endif
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@ -0,0 +1,29 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2015 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/asm.h>
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#include "cortex_a57.h"
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ENTRY(arm64_cpu_early_setup)
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mrs x0, CPUECTLR_EL1
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orr x0, x0, #(1 << SMPEN_SHIFT)
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msr CPUECTLR_EL1, x0
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isb
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ret
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ENDPROC(arm64_cpu_early_setup)
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@ -0,0 +1,26 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2015 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
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*/
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#ifndef __ARCH_ARM64_CORTEX_A57_H__
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#define __ARCH_ARM64_CORTEX_A57_H__
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#define CPUECTLR_EL1 S3_1_c15_c2_1
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#define SMPEN_SHIFT 6
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#endif /* __ARCH_ARM64_CORTEX_A57_H__ */
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@ -209,6 +209,7 @@ ENDPROC(__rmodule_entry)
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CPU_RESET_ENTRY(arm64_cpu_startup)
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split_bsp_path
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bl arm64_cpu_early_setup
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setup_sctlr
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b arm64_c_environment
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ENDPROC(arm64_cpu_startup)
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