arm64: Allow cpu specific early setup

Call arm64_cpu_early_setup to allow cpu-specific initialization to be
performed. Also, add support for setting SMPEN bit for cortex a57
within arm64_cpu_early_setup.

BUG=chrome-os-partner:38222
BRANCH=None
TEST=Compiles successfully and SMP works for foster

Change-Id: Ifa4e6134dbce3ad63046b3dd9b947c3d9134d5e7
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: fe0eac5f416efcf9f7b05388a17444205a8352c0
Original-Change-Id: I28a05a20e6adf084cd0bf94bdd0c3b492632107c
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/262993
Original-Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9977
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>

src/arch/arm64/Kconfig

@@ -30,6 +30,7 @@ config ARCH_SPINTABLE
 	depends on ARCH_RAMSTAGE_ARM64
 
 source src/arch/arm64/armv8/Kconfig
+source src/arch/arm64/cpu/Kconfig
 
 # If a custom bootblock is necessary, this option should be "select"-ed by
 # the thing that needs it, probably the CPU.

src/arch/arm64/Makefile.inc

@@ -27,7 +27,7 @@
 # Take care of subdirectories
 ################################################################################
 
-subdirs-y += armv8/
+subdirs-y += armv8/ cpu/
 
 ################################################################################
 # ARM specific options
@@ -60,6 +60,7 @@ $(obj)/arch/arm64/id.bootblock.o: $(obj)/build.h
 bootblock-y += boot.c
 bootblock-y += c_entry.c
 bootblock-y += stage_entry.S
+bootblock-y += cpu-stubs.c
 bootblock-y += stages.c
 bootblock-y += eabi_compat.c
 bootblock-y += transition.c transition_asm.S
@@ -107,6 +108,7 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_ARM64),y)
 romstage-y += boot.c
 romstage-y += c_entry.c
 romstage-y += stage_entry.S
+romstage-y += cpu-stubs.c
 romstage-y += stages.c
 romstage-y += div0.c
 romstage-y += eabi_compat.c
@@ -149,6 +151,7 @@ ramstage-y += ../../lib/memset.c
 ramstage-y += ../../lib/memcpy.c
 ramstage-y += ../../lib/memmove.c
 ramstage-y += stage_entry.S
+ramstage-y += cpu-stubs.c
 ramstage-$(CONFIG_ARCH_SPINTABLE) += spintable.c spintable_asm.S
 ramstage-y += transition.c transition_asm.S
 
@@ -158,6 +161,7 @@ rmodules_arm64-y += ../../lib/memmove.c
 rmodules_arm64-y += eabi_compat.c
 
 secmon-$(CONFIG_ARCH_USE_SECURE_MONITOR) += stage_entry.S
+secmon-$(CONFIG_ARCH_USE_SECURE_MONITOR) += cpu-stubs.c
 secmon-$(CONFIG_ARCH_USE_SECURE_MONITOR) += startup.c
 secmon-$(CONFIG_ARCH_USE_SECURE_MONITOR) += ../../lib/malloc.c
 secmon-$(CONFIG_ARCH_USE_SECURE_MONITOR) += ../../lib/memset.c

src/arch/arm64/cpu-stubs.c

@@ -0,0 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
+ */
+
+void arm64_cpu_early_setup(void);
+
+void __attribute__((weak)) arm64_cpu_early_setup(void)
+{
+	/* Default empty implementation */
+}

src/arch/arm64/cpu/Kconfig

@@ -0,0 +1,23 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2015 Google Inc
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+config ARCH_ARM64_CPU_CORTEX_A57
+	bool
+	default n
+	depends on ARCH_ARM64

src/arch/arm64/cpu/Makefile.inc

@@ -0,0 +1,24 @@
+################################################################################
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2015 Google Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+################################################################################
+
+ifeq ($(CONFIG_ARCH_RAMSTAGE_ARM64),y)
+ramstage-$(CONFIG_ARCH_ARM64_CPU_CORTEX_A57) += cortex_a57.S
+endif

src/arch/arm64/cpu/cortex_a57.S

@@ -0,0 +1,29 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <arch/asm.h>
+#include "cortex_a57.h"
+
+ENTRY(arm64_cpu_early_setup)
+	mrs x0, CPUECTLR_EL1
+	orr x0, x0, #(1 << SMPEN_SHIFT)
+	msr CPUECTLR_EL1, x0
+	isb
+	ret
+ENDPROC(arm64_cpu_early_setup)

src/arch/arm64/cpu/cortex_a57.h

@@ -0,0 +1,26 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
+ */
+
+#ifndef __ARCH_ARM64_CORTEX_A57_H__
+#define __ARCH_ARM64_CORTEX_A57_H__
+
+#define CPUECTLR_EL1	S3_1_c15_c2_1
+#define SMPEN_SHIFT	6
+
+#endif /* __ARCH_ARM64_CORTEX_A57_H__ */

src/arch/arm64/stage_entry.S

@@ -209,6 +209,7 @@ ENDPROC(__rmodule_entry)
 
 CPU_RESET_ENTRY(arm64_cpu_startup)
 	split_bsp_path
+	bl arm64_cpu_early_setup
 	setup_sctlr
 	b	arm64_c_environment
 ENDPROC(arm64_cpu_startup)