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Add "reasonable" values in ASL at places we overwrite from 

coreboot later. Current ASL compilers check for validity
and complain about the dummy values.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5579 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2010-05-21 20:40:38 +00:00 committed by Patrick Georgi
parent 1c0c6372a9
commit 36de0424f2
15 changed files with 108 additions and 108 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
src/mainboard/amd/dbm690t/dsdt.asl
View File

@ -1348,10 +1348,10 @@ DefinitionBlock (
Name(_CRS, ResourceTemplate() {
DMA(Compatibility,BusMaster,Transfer8){4}
IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
IO(Decode16, 0x0081, 0x0081, 0x10, 0x03)
IO(Decode16, 0x0087, 0x0087, 0x10, 0x01)
IO(Decode16, 0x0089, 0x0089, 0x10, 0x03)
IO(Decode16, 0x008F, 0x008F, 0x10, 0x01)
IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
}) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
} /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
@ -1502,29 +1502,29 @@ DefinitionBlock (
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
PCBM
)
/* DRAM memory from 4GB to TopMem2 */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0xFFFFFFFF, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
DMHI
)
/* BIOS space just below 16EB */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0xFFFFFFFF, /* Granularity */
0x00000000, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
PEBM
)

22
src/mainboard/amd/mahogany/dsdt.asl
View File

@ -1364,10 +1364,10 @@ DefinitionBlock (
Name(_CRS, ResourceTemplate() {
DMA(Compatibility,BusMaster,Transfer8){4}
IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
IO(Decode16, 0x0081, 0x0081, 0x10, 0x03)
IO(Decode16, 0x0087, 0x0087, 0x10, 0x01)
IO(Decode16, 0x0089, 0x0089, 0x10, 0x03)
IO(Decode16, 0x008F, 0x008F, 0x10, 0x01)
IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
}) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
} /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
@ -1517,29 +1517,29 @@ DefinitionBlock (
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
PCBM
)
/* DRAM memory from 4GB to TopMem2 */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0xFFFFFFFF, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
DMHI
)
/* BIOS space just below 16EB */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0xFFFFFFFF, /* Granularity */
0x00000000, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
PEBM
)

22
src/mainboard/amd/mahogany_fam10/dsdt.asl
View File

@ -1406,10 +1406,10 @@ DefinitionBlock (
Name(_CRS, ResourceTemplate() {
DMA(Compatibility,BusMaster,Transfer8){4}
IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
IO(Decode16, 0x0081, 0x0081, 0x10, 0x03)
IO(Decode16, 0x0087, 0x0087, 0x10, 0x01)
IO(Decode16, 0x0089, 0x0089, 0x10, 0x03)
IO(Decode16, 0x008F, 0x008F, 0x10, 0x01)
IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
}) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
} /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
@ -1559,29 +1559,29 @@ DefinitionBlock (
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
PCBM
)
/* DRAM memory from 4GB to TopMem2 */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0xFFFFFFFF, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
DMHI
)
/* BIOS space just below 16EB */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0xFFFFFFFF, /* Granularity */
0x00000000, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
PEBM
)

22
src/mainboard/amd/pistachio/dsdt.asl
View File

@ -1347,10 +1347,10 @@ DefinitionBlock (
Name(_CRS, ResourceTemplate() {
DMA(Compatibility,BusMaster,Transfer8){4}
IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
IO(Decode16, 0x0081, 0x0081, 0x10, 0x03)
IO(Decode16, 0x0087, 0x0087, 0x10, 0x01)
IO(Decode16, 0x0089, 0x0089, 0x10, 0x03)
IO(Decode16, 0x008F, 0x008F, 0x10, 0x01)
IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
}) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
} /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
@ -1425,29 +1425,29 @@ DefinitionBlock (
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
PCBM
)
/* DRAM memory from 4GB to TopMem2 */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0xFFFFFFFF, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
DMHI
)
/* BIOS space just below 16EB */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0xFFFFFFFF, /* Granularity */
0x00000000, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
PEBM
)

2
src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl
View File

@ -124,7 +124,7 @@
Name (BUF0, ResourceTemplate ()
{
Memory32Fixed (ReadWrite, 0x000E0000, 0x00020000) // BIOS E4000-FFFFF
Memory32Fixed (ReadWrite, 0x000C0000, 0x00000000) // video BIOS c0000-c8404
Memory32Fixed (ReadWrite, 0x000C0000, 0x00010000) // video BIOS c0000-c8404
Memory32Fixed (ReadWrite, 0xFEC00000, 0x00001000) // I/O APIC
Memory32Fixed (ReadWrite, 0xFFC00000, 0x00380000) // LPC forwarded, 4 MB w/ROM
Memory32Fixed (ReadWrite, 0xFEE00000, 0x00001000) // Local APIC

4
src/mainboard/amd/serengeti_cheetah/dsdt.asl
View File

@ -66,9 +66,9 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Address Space Granularity
0x000C0000, // Address Range Minimum
0x00000000, // Address Range Maximum
0x000CFFFF, // Address Range Maximum
0x00000000, // Address Translation Offset
0x00000000,,,
0x00010000,,,
, AddressRangeMemory, TypeStatic) //Video BIOS A0000h-C7FFFh
Memory32Fixed (ReadWrite, 0x000D8000, 0x00004000)//USB HC D8000-DBFFF

2
src/mainboard/amd/serengeti_cheetah_fam10/acpi/amd8111_isa.asl
View File

@ -140,7 +140,7 @@
Name (BUF0, ResourceTemplate ()
{
Memory32Fixed (ReadWrite, 0x000E0000, 0x00020000) // BIOS E4000-FFFFF
Memory32Fixed (ReadWrite, 0x000C0000, 0x00000000) // video BIOS c0000-c8404
Memory32Fixed (ReadWrite, 0x000C0000, 0x00010000) // video BIOS c0000-c8404
Memory32Fixed (ReadWrite, 0xFEC00000, 0x00001000) // I/O APIC
Memory32Fixed (ReadWrite, 0xFFC00000, 0x00380000) // LPC forwarded, 4 MB w/ROM
Memory32Fixed (ReadWrite, 0xFEE00000, 0x00001000) // Local APIC

4
src/mainboard/amd/serengeti_cheetah_fam10/dsdt.asl
View File

@ -82,9 +82,9 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-FAM10", "AMDACPI", 100925440)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Address Space Granularity
0x000C0000, // Address Range Minimum
0x00000000, // Address Range Maximum
0x000CFFFF, // Address Range Maximum
0x00000000, // Address Translation Offset
0x00000000,,,
0x00010000,,,
, AddressRangeMemory, TypeStatic) //Video BIOS A0000h-C7FFFh
Memory32Fixed (ReadWrite, 0x000D8000, 0x00004000)//USB HC D8000-DBFFF

22
src/mainboard/amd/tilapia_fam10/dsdt.asl
View File

@ -1406,10 +1406,10 @@ DefinitionBlock (
Name(_CRS, ResourceTemplate() {
DMA(Compatibility,BusMaster,Transfer8){4}
IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
IO(Decode16, 0x0081, 0x0081, 0x10, 0x03)
IO(Decode16, 0x0087, 0x0087, 0x10, 0x01)
IO(Decode16, 0x0089, 0x0089, 0x10, 0x03)
IO(Decode16, 0x008F, 0x008F, 0x10, 0x01)
IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
}) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
} /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
@ -1559,29 +1559,29 @@ DefinitionBlock (
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
PCBM
)
/* DRAM memory from 4GB to TopMem2 */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0xFFFFFFFF, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
DMHI
)
/* BIOS space just below 16EB */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0xFFFFFFFF, /* Granularity */
0x00000000, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
PEBM
)

22
src/mainboard/asrock/939a785gmh/dsdt.asl
View File

@ -1364,10 +1364,10 @@ DefinitionBlock (
Name(_CRS, ResourceTemplate() {
DMA(Compatibility,BusMaster,Transfer8){4}
IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
IO(Decode16, 0x0081, 0x0081, 0x10, 0x03)
IO(Decode16, 0x0087, 0x0087, 0x10, 0x01)
IO(Decode16, 0x0089, 0x0089, 0x10, 0x03)
IO(Decode16, 0x008F, 0x008F, 0x10, 0x01)
IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
}) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
} /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
@ -1517,29 +1517,29 @@ DefinitionBlock (
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
PCBM
)
/* DRAM memory from 4GB to TopMem2 */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0xFFFFFFFF, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
DMHI
)
/* BIOS space just below 16EB */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0xFFFFFFFF, /* Granularity */
0x00000000, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
PEBM
)

2
src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl
View File

@ -124,7 +124,7 @@
Name (BUF0, ResourceTemplate ()
{
Memory32Fixed (ReadWrite, 0x000E0000, 0x00020000) // BIOS E4000-FFFFF
Memory32Fixed (ReadWrite, 0x000C0000, 0x00000000) // video BIOS c0000-c8404
Memory32Fixed (ReadWrite, 0x000C0000, 0x00010000) // video BIOS c0000-c8404
Memory32Fixed (ReadWrite, 0xFEC00000, 0x00001000) // I/O APIC
Memory32Fixed (ReadWrite, 0xFFC00000, 0x00380000) // LPC forwarded, 4 MB w/ROM
Memory32Fixed (ReadWrite, 0xFEE00000, 0x00001000) // Local APIC

4
src/mainboard/iwill/dk8_htx/dsdt.asl
View File

@ -66,9 +66,9 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Address Space Granularity
0x000C0000, // Address Range Minimum
0x00000000, // Address Range Maximum
0x000CFFFF, // Address Range Maximum
0x00000000, // Address Translation Offset
0x00000000,,,
0x00010000,,,
, AddressRangeMemory, TypeStatic) //Video BIOS A0000h-C7FFFh
Memory32Fixed (ReadWrite, 0x000D8000, 0x00004000)//USB HC D8000-DBFFF

22
src/mainboard/kontron/kt690/dsdt.asl
View File

@ -1348,10 +1348,10 @@ DefinitionBlock (
Name(_CRS, ResourceTemplate() {
DMA(Compatibility,BusMaster,Transfer8){4}
IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
IO(Decode16, 0x0081, 0x0081, 0x10, 0x03)
IO(Decode16, 0x0087, 0x0087, 0x10, 0x01)
IO(Decode16, 0x0089, 0x0089, 0x10, 0x03)
IO(Decode16, 0x008F, 0x008F, 0x10, 0x01)
IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
}) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
} /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
@ -1502,29 +1502,29 @@ DefinitionBlock (
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
PCBM
)
/* DRAM memory from 4GB to TopMem2 */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0xFFFFFFFF, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
DMHI
)
/* BIOS space just below 16EB */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0xFFFFFFFF, /* Granularity */
0x00000000, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
PEBM
)

22
src/mainboard/technexion/tim5690/dsdt.asl
View File

@ -1348,10 +1348,10 @@ DefinitionBlock (
Name(_CRS, ResourceTemplate() {
DMA(Compatibility,BusMaster,Transfer8){4}
IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
IO(Decode16, 0x0081, 0x0081, 0x10, 0x03)
IO(Decode16, 0x0087, 0x0087, 0x10, 0x01)
IO(Decode16, 0x0089, 0x0089, 0x10, 0x03)
IO(Decode16, 0x008F, 0x008F, 0x10, 0x01)
IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
}) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
} /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
@ -1502,29 +1502,29 @@ DefinitionBlock (
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
PCBM
)
/* DRAM memory from 4GB to TopMem2 */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0xFFFFFFFF, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
DMHI
)
/* BIOS space just below 16EB */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0xFFFFFFFF, /* Granularity */
0x00000000, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
PEBM
)

22
src/mainboard/technexion/tim8690/dsdt.asl
View File

@ -1348,10 +1348,10 @@ DefinitionBlock (
Name(_CRS, ResourceTemplate() {
DMA(Compatibility,BusMaster,Transfer8){4}
IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
IO(Decode16, 0x0081, 0x0081, 0x10, 0x03)
IO(Decode16, 0x0087, 0x0087, 0x10, 0x01)
IO(Decode16, 0x0089, 0x0089, 0x10, 0x03)
IO(Decode16, 0x008F, 0x008F, 0x10, 0x01)
IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
}) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
} /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
@ -1502,29 +1502,29 @@ DefinitionBlock (
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
PCBM
)
/* DRAM memory from 4GB to TopMem2 */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0xFFFFFFFF, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
DMHI
)
/* BIOS space just below 16EB */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0xFFFFFFFF, /* Granularity */
0x00000000, /* Granularity */
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Max */
0x00000000, /* Translation */
0x00000000, /* Max-Min, RLEN */
0x00000001, /* Max-Min, RLEN */
,,
PEBM
)