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soc/intel/common: Helper function to check CSE device `devfn` status 

This patch creates a helper function in cse common code block to check
the status of any CSE `devfn`. Example: CSE, CSE_2, IDER, KT, CSE_3 and
CSE_4.

Currently cse common code is only able to read the device state of
`PCH_DEVFN_CSE` CSE device alone.

Additionally, print `slot` and 'func' number of CSE devices in case
the device is either disable or hidden.

BUG=b:200644229
TEST=Able to build and boot ADLRVP-P with this patch where the serial
message listed the CSE devices that are disabled in the device tree
as below:

HECI: CSE device 16.01 is disabled
HECI: CSE device 16.04 is disabled
HECI: CSE device 16.05 is disabled

Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Change-Id: I208b07e89e3aa9d682837380809fbff01ea225b0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58064
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Subrata Banik 2021-09-30 16:59:09 +05:30
parent c6e2552ce6
commit 3710e9972b
2 changed files with 18 additions and 6 deletions
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18
src/soc/intel/common/block/cse/cse.c
View File

@ -581,23 +581,29 @@ int heci_reset(void)
return 0; return 0;
} }
bool is_cse_enabled(void) bool is_cse_devfn_visible(unsigned int devfn)
{ {
const struct device *cse_dev = pcidev_path_on_root(PCH_DEVFN_CSE); int slot = PCI_SLOT(devfn);
int func = PCI_FUNC(devfn);
if (!cse_dev || !cse_dev->enabled) { if (!is_devfn_enabled(devfn)) {
printk(BIOS_WARNING, "HECI: No CSE device\n"); printk(BIOS_WARNING, "HECI: CSE device %02x.%01x is disabled\n", slot, func);
return false; return false;
} }
if (pci_read_config16(PCH_DEV_CSE, PCI_VENDOR_ID) == 0xFFFF) { if (pci_read_config16(PCI_DEV(0, slot, func), PCI_VENDOR_ID) == 0xFFFF) {
printk(BIOS_WARNING, "HECI: CSE device is hidden\n"); printk(BIOS_WARNING, "HECI: CSE device %02x.%01x is hidden\n", slot, func);
return false; return false;
} }
return true; return true;
} }
bool is_cse_enabled(void)
{
return is_cse_devfn_visible(PCH_DEVFN_CSE);
}
uint32_t me_read_config32(int offset) uint32_t me_read_config32(int offset)
{ {
return pci_read_config32(PCH_DEV_CSE, offset); return pci_read_config32(PCH_DEV_CSE, offset);

6
src/soc/intel/common/block/include/intelblocks/cse.h
View File

@ -152,6 +152,12 @@ void heci_disable(void);
/* Reads config value from a specified offset in the CSE PCI Config space. */ /* Reads config value from a specified offset in the CSE PCI Config space. */
uint32_t me_read_config32(int offset); uint32_t me_read_config32(int offset);
/*
* Check if the CSE device as per function argument `devfn` is enabled in device tree
* and also visible on the PCI bus.
*/
bool is_cse_devfn_visible(unsigned int devfn);
/* /*
* Check if the CSE device is enabled in device tree. Also check if the device * Check if the CSE device is enabled in device tree. Also check if the device
* is visible on the PCI bus by reading config space. * is visible on the PCI bus by reading config space.