soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig

This change is mainly to control PlatformDebugConsent FSP UPD.
PlatformDebugConsent is enabled if SOC_INTEL_CANNONLAKE_DEBUG_CONSENT != 0.
PlatformDebugConsent in FspmUpd.h has the details.

BUG=b:130203864
TEST=boot ok and PlatformDebugConsent can be controlled by Kconfig

Change-Id: Ib845b5e42bc78fb352a0c97c6301f2aeca522f29
Signed-off-by: Kane Chen <kane.chen@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32297
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Kane Chen 2019-04-11 21:55:20 +08:00 committed by Patrick Georgi
parent f5e8b29be6
commit 3717256d5a
3 changed files with 14 additions and 11 deletions

View File

@ -292,4 +292,15 @@ config FSP_FD_PATH
depends on FSP_USE_REPO
default "3rdparty/fsp/CoffeeLakeFspBinPkg/Fsp.fd" if SOC_INTEL_COFFEELAKE || SOC_INTEL_WHISKEYLAKE
config SOC_INTEL_CANNONLAKE_DEBUG_CONSENT
int "Debug Consent for CNL"
# USB DBC is more common for developers so make this default to 3 if
# SOC_INTEL_DEBUG_CONSENT=y
default 3 if SOC_INTEL_DEBUG_CONSENT
default 0
help
This is to control debug interface on SOC.
Setting non-zero value will allow to use DBC or DCI to debug SOC.
PlatformDebugConsent in FspmUpd.h has the details.
endif

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@ -292,15 +292,6 @@ struct soc_intel_cannonlake_config {
*/
uint8_t PchPmSlpAMinAssert;
/* Desired platform debug type. */
enum {
DebugConsent_Disabled,
DebugConsent_DCI_DBC,
DebugConsent_DCI,
DebugConsent_USB3_DBC,
DebugConsent_XDP, /* XDP/Mipi60 */
DebugConsent_USB2_DBC,
} DebugConsent;
/*
* SerialIO device mode selection:
*

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@ -108,9 +108,10 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
m_cfg->SmbusEnable = 0;
else
m_cfg->SmbusEnable = smbus->enabled;
/* Set debug probe type */
m_cfg->PlatformDebugConsent = config->DebugConsent;
/* Set debug probe type */
m_cfg->PlatformDebugConsent =
CONFIG_SOC_INTEL_CANNONLAKE_DEBUG_CONSENT;
mainboard_memory_init_params(mupd);
}