soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig
This change is mainly to control PlatformDebugConsent FSP UPD. PlatformDebugConsent is enabled if SOC_INTEL_CANNONLAKE_DEBUG_CONSENT != 0. PlatformDebugConsent in FspmUpd.h has the details. BUG=b:130203864 TEST=boot ok and PlatformDebugConsent can be controlled by Kconfig Change-Id: Ib845b5e42bc78fb352a0c97c6301f2aeca522f29 Signed-off-by: Kane Chen <kane.chen@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32297 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -292,4 +292,15 @@ config FSP_FD_PATH
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depends on FSP_USE_REPO
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default "3rdparty/fsp/CoffeeLakeFspBinPkg/Fsp.fd" if SOC_INTEL_COFFEELAKE || SOC_INTEL_WHISKEYLAKE
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config SOC_INTEL_CANNONLAKE_DEBUG_CONSENT
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int "Debug Consent for CNL"
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# USB DBC is more common for developers so make this default to 3 if
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# SOC_INTEL_DEBUG_CONSENT=y
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default 3 if SOC_INTEL_DEBUG_CONSENT
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default 0
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help
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This is to control debug interface on SOC.
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Setting non-zero value will allow to use DBC or DCI to debug SOC.
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PlatformDebugConsent in FspmUpd.h has the details.
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endif
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@ -292,15 +292,6 @@ struct soc_intel_cannonlake_config {
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*/
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uint8_t PchPmSlpAMinAssert;
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/* Desired platform debug type. */
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enum {
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DebugConsent_Disabled,
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DebugConsent_DCI_DBC,
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DebugConsent_DCI,
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DebugConsent_USB3_DBC,
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DebugConsent_XDP, /* XDP/Mipi60 */
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DebugConsent_USB2_DBC,
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} DebugConsent;
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/*
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* SerialIO device mode selection:
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*
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@ -108,9 +108,10 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
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m_cfg->SmbusEnable = 0;
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else
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m_cfg->SmbusEnable = smbus->enabled;
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/* Set debug probe type */
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m_cfg->PlatformDebugConsent = config->DebugConsent;
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/* Set debug probe type */
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m_cfg->PlatformDebugConsent =
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CONFIG_SOC_INTEL_CANNONLAKE_DEBUG_CONSENT;
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mainboard_memory_init_params(mupd);
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}
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