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soc/amd/common/psp: Require PSP PCI definition in SOC 

Remove the definition for the PSP PCI device from the common PSP
code.  Any APU using this source should have its own definitions,
and this allows for the device to move within the config space.

Change-Id: Ie41dfa348b04f655640b4259b1aa518376655251
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/22249
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Marshall Dawson 2017-10-27 20:12:46 -06:00 committed by Aaron Durbin
parent 1ab8c01050
commit 3727708aef
2 changed files with 4 additions and 12 deletions
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10
src/soc/amd/common/block/include/amdblocks/psp.h
View File

@ -16,6 +16,7 @@
#ifndef __AMD_PSP_H__
#define __AMD_PSP_H__
#include <soc/pci_devs.h>
#include <stdint.h>
#include <compiler.h>
#include <Porting.h>
@ -79,15 +80,6 @@ struct mbox_default_buffer { /* command-response buffer unused by command */
#define PSPSTS_INIT_TIMEOUT 5
#define PSPSTS_CMD_TIMEOUT 6
#if !defined(__SIMPLE_DEVICE__)
#include <device/device.h>
#include <device/pci_def.h>
#define PSP_DEV dev_find_slot(0, PCI_DEVFN(PSP_PCI_DEV, PSP_PCI_FN))
#else
#include <arch/io.h>
#define PSP_DEV PCI_DEV(0, PSP_PCI_DEV, PSP_PCI_FN)
#endif
#define PSP_INIT_TIMEOUT 10000 /* 10 seconds */
#define PSP_CMD_TIMEOUT 1000 /* 1 second */

6
src/soc/amd/common/block/psp/psp.c
View File

@ -127,8 +127,8 @@ static int send_psp_command(u32 command, void *buffer)
if (!mbox)
return -PSPSTS_NOBASE;
command_reg = pci_read_config32(PSP_DEV, PCI_COMMAND);
pci_write_config32(PSP_DEV, PCI_COMMAND, command_reg |
command_reg = pci_read_config32(SOC_PSP_DEV, PCI_COMMAND);
pci_write_config32(SOC_PSP_DEV, PCI_COMMAND, command_reg |
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
/* check for PSP error conditions */
@ -168,7 +168,7 @@ static int send_psp_command(u32 command, void *buffer)
}
exit:
/* restore command register to original value */
pci_write_config32(PSP_DEV, PCI_COMMAND, command_reg);
pci_write_config32(SOC_PSP_DEV, PCI_COMMAND, command_reg);
return status;
}