skylake: dptf: Add TSR3 thermal sensor and CPU code cleanup

- glados has more thermal sensors that could be used so add
another entry in the DTPF thermal sensor ACPI code.
- fix indentation block in cpu.asl.
- declare \_SB.MPDL as external (it is already CondRefOf)
so it does not need to be present in mainboard config if
the mainboard does not want to override the default.

BUG=chrome-os-partner:44622
BRANCH=none
TEST=emerge-glados coreboot

Change-Id: I1afe7013a24ee1215f5e968e25594f746bbdd17c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 8d357437d06349039a94869b088c3c50b32933c0
Original-Change-Id: Ie87d52e735bf930a003e525cf1918789920922a5
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/297335
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11558
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Duncan Laurie 2015-09-03 15:57:56 -07:00 committed by Patrick Georgi
parent 3bad4cb086
commit 372b67e22b
2 changed files with 71 additions and 6 deletions

View File

@ -50,6 +50,7 @@ External (\_PR.CPU0._TSS, MethodObj)
External (\_PR.CPU0._TPC, MethodObj) External (\_PR.CPU0._TPC, MethodObj)
External (\_PR.CPU0._PTC, PkgObj) External (\_PR.CPU0._PTC, PkgObj)
External (\_PR.CPU0._TSD, PkgObj) External (\_PR.CPU0._TSD, PkgObj)
External (\_SB.MPDL, IntObj)
Device (B0D4) Device (B0D4)
{ {
@ -146,12 +147,12 @@ Device (B0D4)
{ {
If (CondRefOf (\_PR.CP00._PSS)) { If (CondRefOf (\_PR.CP00._PSS)) {
Return (\_PR.CP00._PSS) Return (\_PR.CP00._PSS)
} Else { } Else {
Return (Package () Return (Package ()
{ {
Package () { 0, 0, 0, 0, 0, 0 } Package () { 0, 0, 0, 0, 0, 0 }
}) })
} }
} }

View File

@ -38,6 +38,11 @@ Method (TEVT, 1, NotSerialized)
Notify (^TSR2, 0x90) Notify (^TSR2, 0x90)
} }
#endif #endif
#ifdef DPTF_TSR3_SENSOR_ID
If (LEqual (Local0, DPTF_TSR3_SENSOR_ID)) {
Notify (^TSR3, 0x90)
}
#endif
} }
/* Thermal device initialization - Disable Aux Trip Points */ /* Thermal device initialization - Disable Aux Trip Points */
@ -52,6 +57,9 @@ Method (TINI)
#ifdef DPTF_TSR2_SENSOR_ID #ifdef DPTF_TSR2_SENSOR_ID
^TSR2.PATD () ^TSR2.PATD ()
#endif #endif
#ifdef DPTF_TSR3_SENSOR_ID
^TSR3.PATD ()
#endif
} }
#ifdef DPTF_TSR0_SENSOR_ID #ifdef DPTF_TSR0_SENSOR_ID
@ -221,3 +229,59 @@ Device (TSR2)
} }
} }
#endif #endif
#ifdef DPTF_TSR3_SENSOR_ID
Device (TSR3)
{
Name (_HID, EISAID ("INT3403"))
Name (_UID, 4)
Name (PTYP, 0x03)
Name (TMPI, DPTF_TSR3_SENSOR_ID)
Name (_STR, Unicode (DPTF_TSR3_SENSOR_NAME))
Name (GTSH, 20) /* 2 degree hysteresis */
Method (_STA)
{
If (LEqual (\DPTE, One)) {
Return (0xF)
} Else {
Return (0x0)
}
}
Method (_TMP, 0, Serialized)
{
Return (\_SB.PCI0.LPCB.EC0.TSRD (TMPI))
}
Method (_PSV)
{
Return (CTOK (DPTF_TSR3_PASSIVE))
}
Method (_CRT)
{
Return (CTOK (DPTF_TSR3_CRITICAL))
}
Name (PATC, 2)
/* Set Aux Trip Point */
Method (PAT0, 1, Serialized)
{
\_SB.PCI0.LPCB.EC0.PAT0 (TMPI, Arg0)
}
/* Set Aux Trip Point */
Method (PAT1, 1, Serialized)
{
\_SB.PCI0.LPCB.EC0.PAT1 (TMPI, Arg0)
}
/* Disable Aux Trip Point */
Method (PATD, 0, Serialized)
{
\_SB.PCI0.LPCB.EC0.PATD (TMPI)
}
}
#endif