arch/x86/Kconfig: introduce RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT
Since also some AMD CPUs have reserved physical address bits that can't be used as normal address bits, introduce the RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT Kconfig option which gets selected by CPU_INTEL_COMMON, and use the new common option to configure if the specific SoC/CPU code implements get_reserved_phys_addr_bits or if the default of this returning 0 is used instead. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I0059e63a160e60ddee280635bba72d363deca7f7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/78073 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
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@ -92,6 +92,16 @@ config ARCH_X86_64_PGTBL_LOC
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The position where to place pagetables. Needs to be known at
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compile time. Must not overlap other files in CBFS.
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config RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT
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bool
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help
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On some systems, the upper physical address bits are reserved and
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used as a tag which is typically related to a memory encryption
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feature. When selecting this option, the SoC code needs to implement
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get_reserved_phys_addr_bits so that the common code knows how many of
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the most significant physical address bits are reserved and can't be
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used as address bits.
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# This is an SMP option. It relates to starting up APs.
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# It is usually set in mainboard/*/Kconfig.
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# TODO: Improve description.
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@ -316,7 +316,7 @@ size_t get_cache_size(const struct cpu_cache_info *info);
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*/
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bool fill_cpu_cache_info(uint8_t level, struct cpu_cache_info *info);
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#if CONFIG(CPU_INTEL_COMMON)
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#if CONFIG(RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT)
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unsigned int get_reserved_phys_addr_bits(void);
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#else
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/* Default implementation */
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@ -1,5 +1,6 @@
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config CPU_INTEL_COMMON
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bool
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select RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT
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if CPU_INTEL_COMMON
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